From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AA262C77B7A for ; Thu, 1 Jun 2023 15:24:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233534AbjFAPYL (ORCPT ); Thu, 1 Jun 2023 11:24:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34780 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232380AbjFAPYI (ORCPT ); Thu, 1 Jun 2023 11:24:08 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 12232E2; Thu, 1 Jun 2023 08:24:07 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2F7FA1063; Thu, 1 Jun 2023 08:24:52 -0700 (PDT) Received: from [10.57.84.85] (unknown [10.57.84.85]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 444463F663; Thu, 1 Jun 2023 08:24:05 -0700 (PDT) Message-ID: Date: Thu, 1 Jun 2023 16:23:57 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; rv:102.0) Gecko/20100101 Thunderbird/102.11.2 Subject: Re: [PATCH v2 5/5] perf: arm_cspmu: ampere_cspmu: Add support for Ampere SoC PMU Content-Language: en-GB To: Ilkka Koskinen , Jonathan Corbet , Will Deacon , Mark Rutland , Besar Wicaksono , Suzuki K Poulose Cc: linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org References: <20230601030144.3458136-1-ilkka@os.amperecomputing.com> <20230601030144.3458136-6-ilkka@os.amperecomputing.com> From: Robin Murphy In-Reply-To: <20230601030144.3458136-6-ilkka@os.amperecomputing.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2023-06-01 04:01, Ilkka Koskinen wrote: [...] > +static bool ampere_cspmu_validate_event(struct arm_cspmu *cspmu, > + struct perf_event *new) > +{ > + struct perf_event *curr; > + unsigned int idx; > + u32 threshold = 0, rank = 0, bank = 0; > + > + /* We compare the global filter settings to existing events */ > + idx = find_first_bit(cspmu->hw_events.used_ctrs, > + cspmu->cycle_counter_logical_idx); > + > + /* This is the first event */ > + if (idx == cspmu->cycle_counter_logical_idx) > + return true; > + > + curr = cspmu->hw_events.events[idx]; > + > + if (get_filter_enable(new)) { > + threshold = get_threshold(new); > + rank = get_rank(new); > + bank = get_bank(new); > + } > + > + if (get_filter_enable(new) != get_filter_enable(curr) || Is there any useful purpose in allowing the user to specify nonzero rank, bank or threshold values with filter_enable=0? Assuming not, then between this and ampere_cspmu_set_ev_filter() it appears that you don't need filter_enable at all. Thanks, Robin. > + get_threshold(curr) != threshold || > + get_rank(curr) != rank || > + get_bank(curr) != bank) > + return false; > + > + return true; > +}