From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CB47217BA5; Wed, 25 Jun 2025 13:55:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750859745; cv=none; b=BXQ60FZ+/KQzH5hwPHIoZaxgMIJnIN31NHBJ5BhBvm+EhFI1wFlkUUfgC0N3VGPDH9iVvrfcdjDKvDpL2pFrLVXN1+bseW3rwCc7x0Zi7L633+udBtbcbkN71DBQVgrNMuMDGKdSf+VwLWTC0dBDdLBIxNH0trXpgz+DJuzPKXM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750859745; c=relaxed/simple; bh=XxWOWWhxw8xigKxwJ1qU+4s3SQ5ALV8rKLToNX1dAcs=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=O+/uCpf1gn6PF7N1UA2UevzEUo8RAqsz5cBg3VCPjG4yg4zH8Wpl7b8my9i5JU8gD0aphS/fdiJWmCleHIBUQmIJI2htqbrY3nrDIPWeXce8uy5fTKUH/C7uDOnNzSJRm8QAM0pjAjt2xxYCl5PGyMXVtwGmOx0I7poLtsPFmPw= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=k03tbyXm; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="k03tbyXm" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 54526C4CEEA; Wed, 25 Jun 2025 13:55:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1750859744; bh=XxWOWWhxw8xigKxwJ1qU+4s3SQ5ALV8rKLToNX1dAcs=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=k03tbyXmTIogvpaMs361UqibAIE6LyeuX4i9GNUJxlvmYSiyPmO8XhPCSgvQdicZl Vi+cgqnqrXJk2u2vk3hlJQiGCOkNYeMSZJgEk4B31fXBcyUi+v+mReIH/g/p7YmHrw vWGl06QUqj7xV+5uCms6Rpg4S0UmAI7wa8ubR1GLq9L1ijkWof4hbflUAc0CMZoo5C lSHTtwxM9XAoSj0fRpmr2yrWGbDrTKJBVSizHwdnET0D0g7KSa1Bj6puGK784Cok0i kyg3tkq2PZrBZcOV17yCp/GEj9Ugiq7v57jSRQUu+dKOUR6UL+7eOMTQnX1PVOW9Rp RGRNPT819kauA== Message-ID: Date: Wed, 25 Jun 2025 15:55:36 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 5/8] dt-bindings: gpu: img,powervr-rogue: Add TH1520 GPU compatible To: Michal Wilczynski , Matt Coster Cc: Drew Fustini , Guo Ren , Fu Wei , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bartosz Golaszewski , Philipp Zabel , Frank Binns , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Ulf Hansson , Marek Szyprowski , Krzysztof Kozlowski , Bartosz Golaszewski , "linux-riscv@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-pm@vger.kernel.org" , "dri-devel@lists.freedesktop.org" References: <20250623-apr_14_for_sending-v6-0-6583ce0f6c25@samsung.com> <20250623-apr_14_for_sending-v6-5-6583ce0f6c25@samsung.com> <9c82a6bc-c6ff-4656-8f60-9d5fa499b61a@imgtec.com> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 8bit On 25/06/2025 14:45, Michal Wilczynski wrote: > > > On 6/24/25 15:53, Matt Coster wrote: >> On 23/06/2025 12:42, Michal Wilczynski wrote: >>> Update the img,powervr-rogue.yaml to include the T-HEAD TH1520 SoC's >>> specific GPU compatible string. >>> >>> The thead,th1520-gpu compatible, along with its full chain >>> img,img-bxm-4-64, and img,img-rogue, is added to the >>> list of recognized GPU types. >>> >>> The power-domains property requirement for img,img-bxm-4-64 is also >>> ensured by adding it to the relevant allOf condition. >>> >>> Acked-by: Krzysztof Kozlowski >>> Reviewed-by: Ulf Hansson >>> Reviewed-by: Bartosz Golaszewski >>> Signed-off-by: Michal Wilczynski >>> --- >>> Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml | 9 ++++++++- >>> 1 file changed, 8 insertions(+), 1 deletion(-) >>> >>> diff --git a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml >>> index 4450e2e73b3ccf74d29f0e31e2e6687d7cbe5d65..9b241a0c1f5941dc58a1e23970f6d3773d427c22 100644 >>> --- a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml >>> +++ b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml >>> @@ -21,6 +21,11 @@ properties: >>> # work with newer dts. >>> - const: img,img-axe >>> - const: img,img-rogue >>> + - items: >>> + - enum: >>> + - thead,th1520-gpu >>> + - const: img,img-bxm-4-64 >>> + - const: img,img-rogue >>> - items: >>> - enum: >>> - ti,j721s2-gpu >>> @@ -93,7 +98,9 @@ allOf: >>> properties: >>> compatible: >>> contains: >>> - const: img,img-axe-1-16m >>> + enum: >>> + - img,img-axe-1-16m >>> + - img,img-bxm-4-64 >> >> This isn't right – BXM-4-64 has two power domains like BXS-4-64. I don't >> really know what the right way to handle that in devicetree is given the >> TH1520 appears to expose only a top-level domain for the entire GPU, but >> there are definitely two separate domains underneath that as far as the >> GPU is concerned (see the attached snippet from integration guide). >> >> Since power nodes are ref-counted anyway, do we just use the same node >> for both domains and let the driver up/down-count it twice? > > Hi Matt, > > Thanks for the very helpful insight. That's a great point, it seems the > SoC's design presents a tricky case for the bindings. > > I see what you mean about potentially using the same power domain node > twice. My only hesitation is that it might be a bit unclear for someone > reading the devicetree later. Perhaps another option could be to relax > the constraint for this compatible? > > Krzysztof, we'd be grateful for your thoughts on how to best model this > situation. It's your hardware, you should tell us, not me. I don't know how many power domains you have there, but for sure it is not one AND two domains the same time. It is either one or two, because power domains are not the same as regulator supplies. Best regards, Krzysztof