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Fri, 30 Oct 2026 05:55:01 -0700 (PDT) Received: from [10.169.205.110] ([178.235.128.140]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-c4cabcfdc30sm63788366b.26.2026.10.30.05.54.58 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 30 Oct 2026 05:55:00 -0700 (PDT) Message-ID: Date: Fri, 30 Oct 2026 13:54:58 +0100 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] arm64: dts: qcom: sc8280xp: add missing Iris IOMMU SID To: Xilin Wu , Bjorn Andersson , Konrad Dybcio , Abel Vesa , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dragon@radxa.com References: <20261030-sc8280xp-iris-iommu-v1-1-1e3fb8562b3d@radxa.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20261030-sc8280xp-iris-iommu-v1-1-1e3fb8562b3d@radxa.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: VAaDnuliJpgNsVdwb7REf7iZhyeIYoVp X-Authority-Analysis: v=2.4 cv=KLzPn1Fo c=1 sm=1 tr=0 ts=6ae493a6 cx=c_pps a=7E5Bxpl4vBhpaufnMqZlrw==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=ksxQWNrZAAAA:8 a=LUNL1vnY_D6g04zkfocA:9 a=QEXdDO2ut3YA:10 a=zZCYzV9kfG8A:10 a=pJ04lnu7RYOZP9TFuWaZ:22 a=l7WU34MJF0Z5EO9KEJC3:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDMwMDA1MSBTYWx0ZWRfX201zzl2VeHMU VJCUjzqevr5G90l18kTIh0f8X3/b37v0VDmJfeztZlAm9x/c4Iw3qsn/zS783Nysx88GKOyaQFJ 2G1P648mRltqoATuPEUdbQtvTtrdg6TZb1Wh9NHLGei7iPsjF3DN05U5n7OYwormg89xcod5/uZ Qx9Xdx3Xi+zyhB3hXrGiqZd2bpeols+kCMUzRCOv8qjTcKKtQdF0ukkbYMvCW5WY2WO4xqlaZWi riKzqse+wiZ2cwaOs0fKWp3uEFv6rvKo6JPe3A5m4emUAd+ZzOZRh86yUZGEn6BplllrTb7SgMg GWehS4rMvvsXR8iAvzQoNTGLJ+Wo1y3R25Rs/onrcvNv7GrfZEwXAy/hHtg6TwZS3xtC56HCqnZ iJ3bEUP7kntOo66VswaJiA2UP7zpsMT2/HbDZjNHhNXQeBUfjVLmkL7ApuV1/tARkgkzkSXf042 gh7Lo/nJNDn/pkt+7gw== X-Proofpoint-ORIG-GUID: VAaDnuliJpgNsVdwb7REf7iZhyeIYoVp X-Proofpoint-Spam-Info: AW1haW4tMjYxMDMwMDA1MSBTYWx0ZWRfX6WMrBJr1Sofv fBN3jPfwEno//+k0b9Q7ht+Rfc6XpcITbJa8G308kYaQvDWf5jzl4sEKn4KTUFx8WmuLp7h4+Rq WMYy9IwiaC3CvuTbK7Kqx5sc7RxbaIA= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-10-30_04,2026-10-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 adultscore=0 spamscore=0 malwarescore=0 impostorscore=0 clxscore=1015 bulkscore=0 lowpriorityscore=0 suspectscore=0 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610190000 definitions=main-2610300051 On 10/29/26 5:14 PM, Xilin Wu wrote: > The Iris VPU on SC8280XP can issue memory transactions using stream ID > 0x2a07. With only the 0x2a00 SID described in the IOMMU list, those > transactions are not attached to the Iris IOMMU domain and can trigger a > non-secure SMMU global fault during video decode. > > This was observed while decoding H.264, where the faulting address fell > inside a DPB buffer mapped for the Iris device. > > Add the missing 0x2a07 stream ID so both Iris access paths are mapped by > the SMMU. > > Note that the issue was observed using Gen2 HFI firmware. > > Signed-off-by: Xilin Wu > --- Any chance you're running into this? https://lore.kernel.org/linux-arm-msm/20260926-vpu_iommu_iova_handling-v5-0-0322ca5dc10c@oss.qualcomm.com/ Konrad