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From: <Mario.Limonciello@dell.com>
To: <mika.westerberg@linux.intel.com>
Cc: <gregkh@linuxfoundation.org>, <andreas.noever@gmail.com>,
	<michael.jamet@intel.com>, <yehezkel.bernat@intel.com>,
	<lukas@wunner.de>, <amir.jer.levy@intel.com>, <luto@kernel.org>,
	<Jared.Dominguez@dell.com>, <andriy.shevchenko@linux.intel.com>,
	<linux-kernel@vger.kernel.org>
Subject: RE: [PATCH 00/24] Thunderbolt security levels and NVM firmware upgrade
Date: Wed, 24 May 2017 19:06:33 +0000	[thread overview]
Message-ID: <e1d99fcdd757474e926525d5bcf938d4@ausx13mpc120.AMER.DELL.COM> (raw)
In-Reply-To: <20170524111120.GA8541@lahna.fi.intel.com>

> -----Original Message-----
> From: Mika Westerberg [mailto:mika.westerberg@linux.intel.com]
> Sent: Wednesday, May 24, 2017 6:11 AM
> To: Limonciello, Mario <Mario_Limonciello@Dell.com>
> Cc: gregkh@linuxfoundation.org; andreas.noever@gmail.com;
> michael.jamet@intel.com; yehezkel.bernat@intel.com; lukas@wunner.de;
> amir.jer.levy@intel.com; luto@kernel.org; Dominguez, Jared
> <Jared_Dominguez@DELL.com>; andriy.shevchenko@linux.intel.com; linux-
> kernel@vger.kernel.org
> Subject: Re: [PATCH 00/24] Thunderbolt security levels and NVM firmware upgrade
> 
> On Tue, May 23, 2017 at 05:30:43PM +0000, Mario.Limonciello@dell.com wrote:
> > (Sorry my email client is not going to wrap these at 80 columns)o
> 
> That's fine. It is more readable this way :)
> 
> > [    0.467319] pci 0000:00:1c.0: [8086:9d10] type 01 class 0x060400
> > [    0.467389] pci 0000:00:1c.0: PME# supported from D0 D3hot D3cold
> > [    0.467513] pci 0000:00:1c.0: System wakeup disabled by ACPI
> 
> [...]
> 
> > [    0.469363] pci 0000:01:00.0: [8086:1576] type 01 class 0x060400
> > [    0.469483] pci 0000:01:00.0: supports D1 D2
> > [    0.469484] pci 0000:01:00.0: PME# supported from D0 D1 D2 D3hot D3cold
> > [    0.469570] pci 0000:01:00.0: System wakeup disabled by ACPI
> > [    0.469609] pci 0000:00:1c.0: PCI bridge to [bus 01-39]
> > [    0.469614] pci 0000:00:1c.0:   bridge window [mem 0xc4000000-0xda0fffff]
> > [    0.469618] pci 0000:00:1c.0:   bridge window [mem 0xa0000000-0xc1ffffff
> 64bit pref]
> > [    0.469621] pci 0000:01:00.0: bridge configuration invalid ([bus 00-00]),
> reconfiguring
> 
> This is the problem. Here the PCIe upstream port (0000:01:00.0) is
> visible to Linux but it is not fully configured by the BIOS ->
> (primary/secondary/subordinate) is set to 0.

So at least for me the other difference between a successful run (where you plug
in after boot instead) is that it shows up as instead:
PCI bridge to [bus 02-39]

Same bridge window though.

> 
> At this point Linux decides to configure the port itself and goes wrong
> since our allocation strategy tries to keep resource windows, including
> reserved buses as small as possible so that everything we currently find
> barely fits there.
> 
> This continues few lines below:
> 
> > [    0.469670] pci_bus 0000:02: busn_res: can not insert [bus 02-ff] under [bus 01-
> 39] (conflicts with (null) [bus 01-39])
> > [    0.469688] pci 0000:02:00.0: [8086:1576] type 01 class 0x060400
> > [    0.469809] pci 0000:02:00.0: supports D1 D2
> > [    0.469810] pci 0000:02:00.0: PME# supported from D0 D1 D2 D3hot D3cold
> > [    0.469877] pci 0000:02:01.0: [8086:1576] type 01 class 0x060400
> > [    0.470000] pci 0000:02:01.0: supports D1 D2
> > [    0.470001] pci 0000:02:01.0: PME# supported from D0 D1 D2 D3hot D3cold
> > [    0.470067] pci 0000:02:02.0: [8086:1576] type 01 class 0x060400
> > [    0.470188] pci 0000:02:02.0: supports D1 D2
> > [    0.470189] pci 0000:02:02.0: PME# supported from D0 D1 D2 D3hot D3cold
> > [    0.470277] pci 0000:01:00.0: PCI bridge to [bus 02-ff]
> > [    0.470283] pci 0000:01:00.0:   bridge window [io  0x0000-0x0fff]
> > [    0.470287] pci 0000:01:00.0:   bridge window [mem 0x00000000-0x000fffff]
> > [    0.470294] pci 0000:01:00.0:   bridge window [mem 0x00000000-0x000fffff
> 64bit pref]
> > [    0.470296] pci 0000:02:00.0: bridge configuration invalid ([bus 00-00]),
> reconfiguring
> > [    0.470304] pci 0000:02:01.0: bridge configuration invalid ([bus 00-00]),
> reconfiguring
> > [    0.470312] pci 0000:02:02.0: bridge configuration invalid ([bus 00-00]),
> reconfiguring
> 
> Here.
> 
> And ends up in failure when we create PCIe tunnels later on.

For what it's worth the XPS 9365 which has a different BIOS core has these
exact same behaviors on Linux if booted with the TBT dock plugged in.

> 
> Now, this is probably where Windows does something else, like it may
> skip re-configuring phase which could explain why it works. However, to
> me this looks pretty much like a bug in the BIOS/firmware as we are
> expecting the BIOS to configure the PCIe devices properly before the OS
> is send ACPI hotplug event.
> 

I'll reach out to the BIOS guys to see if they can give some more comments
from their perspective.

I came across something interesting from browsing MSDN about this topic.
It hasn't been updated in a long time but I think should still be a relevant 
indication of the approach that Windows was taking and why the firmware 
is this way and expecting OS to reconfigure.

"The BIOS cannot preconfigure PCI-to-PCI (P2P) bridges on adapters during 
hot plug. Consequently, the operating system assigns resource windows of 
a default size to a bridge.

I/O window. The default size for the I/O window is 4 KB in Windows 2000, 
Windows XP, and Windows Server 2003.  
Memory window. The configuration for the memory window differs for 
Windows 2000, Windows XP, and Windows Server 2003:
*	For Windows 2000, the default size for the memory window is 2 MB.
*	For Windows XP and Windows Server 2003, the operating system 
first attempts to find a memory window of 32 MB. If it cannot find a 
window of that size, the operating system attempts to find a memory 
window of progressively smaller sizes (16, 8, 4, 2, and finally 1 MB) until
 it finds a size that works."

> We need to handle this in Linux in the same way Windows does but
> currently I have no idea. It is however, more related to our PCI
> enumeration code than the patches in question, I think.
> 

Come to think of it, I have seen the dock have troubles if plugged in at 
boot on Linux even with SL0 before this patch series.

> I also have a Dell 9350 here so I can reproduce the problem and I'm
> going to investigate this further probably involving Linux PCI people.
To clarify are you reproducing it with a TB16 or some other TBT device?

> 
> My testing on the machine shows this behaviour only when the cable is
> connected during boot.

Yep same.

> 
> If I connect the cable after OS is booted I don't see the problem, even
> if I do unplug / plug cycle.
> 
> Can you try that also (again)? And if you see the problem, send me the
> dmesg? I have the latest BIOS (1.4.17) and NVM 16 so this machine
> configuration should match yours if I'm not mistaken.

It does work properly if I boot no cable plugged in and then plug one in.	

  reply	other threads:[~2017-05-24 19:06 UTC|newest]

Thread overview: 106+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-05-18 14:38 Mika Westerberg
2017-05-18 14:38 ` [PATCH 01/24] thunderbolt: Use const buffer pointer in write operations Mika Westerberg
2017-05-25 13:19   ` Greg Kroah-Hartman
2017-05-18 14:38 ` [PATCH 02/24] thunderbolt: Do not try to read UID if DROM offset is read as 0 Mika Westerberg
2017-05-21 13:46   ` Andreas Noever
2017-05-22  8:40     ` Mika Westerberg
2017-05-22 18:41       ` Andreas Noever
2017-05-22 20:38         ` Mika Westerberg
2017-05-22 20:57           ` Andreas Noever
2017-05-18 14:38 ` [PATCH 03/24] thunderbolt: Do not warn about newer DROM versions Mika Westerberg
2017-05-18 14:38 ` [PATCH 04/24] thunderbolt: Add MSI-X support Mika Westerberg
2017-05-21 17:51   ` Andreas Noever
2017-05-22  8:52     ` Mika Westerberg
2017-05-22 10:35       ` Bernat, Yehezkel
2017-05-22 11:01         ` Mika Westerberg
2017-05-18 14:38 ` [PATCH 05/24] thunderbolt: Rework capability handling Mika Westerberg
2017-05-18 16:38   ` Andy Shevchenko
2017-05-19  8:12     ` Mika Westerberg
2017-05-19 13:18       ` Andy Shevchenko
2017-05-21 19:09   ` Andreas Noever
2017-05-22  9:45     ` Mika Westerberg
2017-05-22  9:58       ` Levy, Amir (Jer)
2017-05-25  6:13     ` Lukas Wunner
2017-05-18 14:38 ` [PATCH 06/24] thunderbolt: Introduce thunderbolt bus and connection manager Mika Westerberg
2017-05-18 16:43   ` Andy Shevchenko
2017-05-19  8:15     ` Mika Westerberg
2017-05-19 13:16       ` Andy Shevchenko
2017-05-24 10:28   ` Lukas Wunner
2017-05-24 10:39     ` Mika Westerberg
2017-05-25 13:23   ` Greg Kroah-Hartman
2017-05-25 14:42     ` Mika Westerberg
2017-05-18 14:38 ` [PATCH 07/24] thunderbolt: Convert switch to a device Mika Westerberg
2017-05-18 16:49   ` Andy Shevchenko
2017-05-19  8:20     ` Mika Westerberg
2017-05-24 11:09   ` Lukas Wunner
2017-05-24 11:43     ` Mika Westerberg
2017-05-24 13:53       ` Lukas Wunner
2017-05-25  6:57         ` Mika Westerberg
2017-05-18 14:38 ` [PATCH 08/24] thunderbolt: Fail switch adding operation if reading DROM fails Mika Westerberg
2017-05-18 14:38 ` [PATCH 09/24] thunderbolt: Do not fail if DROM data CRC32 is invalid Mika Westerberg
2017-05-18 14:39 ` [PATCH 10/24] thunderbolt: Read vendor and device name from DROM Mika Westerberg
2017-05-18 19:19   ` Andy Shevchenko
2017-05-19  8:22     ` Mika Westerberg
2017-05-19 10:07   ` Lukas Wunner
2017-05-19 10:28     ` Mika Westerberg
2017-05-21  5:31       ` Lukas Wunner
2017-05-21  7:48         ` Mika Westerberg
2017-05-21  9:33           ` Lukas Wunner
2017-05-18 14:39 ` [PATCH 11/24] thunderbolt: Move control channel messages to tb_msgs.h Mika Westerberg
2017-05-18 14:39 ` [PATCH 12/24] thunderbolt: Expose get_route() to other files Mika Westerberg
2017-05-18 14:39 ` [PATCH 13/24] thunderbolt: Expose make_header() " Mika Westerberg
2017-05-18 14:39 ` [PATCH 14/24] thunderbolt: Let the connection manager handle all notifications Mika Westerberg
2017-05-24 14:00   ` Lukas Wunner
2017-05-25  7:02     ` Mika Westerberg
2017-05-18 14:39 ` [PATCH 15/24] thunderbolt: Rework control channel to be more reliable Mika Westerberg
2017-05-25 13:25   ` Greg Kroah-Hartman
2017-05-25 14:35     ` Mika Westerberg
2017-05-18 14:39 ` [PATCH 16/24] thunderbolt: Add Thunderbolt 3 PCI IDs Mika Westerberg
2017-05-18 14:39 ` [PATCH 17/24] thunderbolt: Add support for NHI mailbox Mika Westerberg
2017-05-18 14:39 ` [PATCH 18/24] thunderbolt: Store Thunderbolt generation in the switch structure Mika Westerberg
2017-05-21  4:47   ` Lukas Wunner
2017-05-21  5:29     ` Levy, Amir (Jer)
2017-05-21  5:35       ` Lukas Wunner
2017-05-21  7:40         ` Mika Westerberg
2017-05-21  8:00           ` Mika Westerberg
2017-05-21  8:07             ` Levy, Amir (Jer)
2017-05-21  9:55               ` Bernat, Yehezkel
2017-05-21 10:47                 ` Mika Westerberg
2017-05-21 11:18                   ` Bernat, Yehezkel
2017-05-21 11:47                     ` Mika Westerberg
2017-05-21 10:44               ` Mika Westerberg
2017-05-18 14:39 ` [PATCH 19/24] thunderbolt: Add support for DMA configuration based mailbox Mika Westerberg
2017-05-18 14:39 ` [PATCH 20/24] thunderbolt: Do not touch the hardware if the NHI is gone on resume Mika Westerberg
2017-05-24 14:43   ` Lukas Wunner
2017-05-25  7:10     ` Mika Westerberg
2017-05-18 14:39 ` [PATCH 21/24] thunderbolt: Add support for Internal Connection Manager (ICM) Mika Westerberg
2017-05-18 14:39 ` [PATCH 22/24] thunderbolt: Add support for host and device NVM firmware upgrade Mika Westerberg
2017-05-18 19:35   ` Andy Shevchenko
2017-05-19  8:26     ` Mika Westerberg
2017-05-25 13:28   ` Greg Kroah-Hartman
2017-05-25 14:39     ` Mika Westerberg
2017-05-25 14:57       ` Greg Kroah-Hartman
2017-05-18 14:39 ` [PATCH 23/24] thunderbolt: Add documentation how Thunderbolt bus can be used Mika Westerberg
2017-05-18 14:39 ` [PATCH 24/24] MAINTAINERS: Add maintainers for Thunderbolt driver Mika Westerberg
2017-05-19 16:35 ` [PATCH 00/24] Thunderbolt security levels and NVM firmware upgrade Mario.Limonciello
2017-05-19 17:19   ` Mika Westerberg
2017-05-19 17:54     ` Mario.Limonciello
2017-05-20  8:24       ` Mika Westerberg
2017-05-22 11:37         ` Mika Westerberg
2017-05-22 20:07           ` Mario.Limonciello
2017-05-22 20:10             ` Bernat, Yehezkel
2017-05-22 23:54               ` Mario.Limonciello
2017-05-22 20:48             ` Mika Westerberg
2017-05-23 17:30               ` Mario.Limonciello
2017-05-24 11:11                 ` Mika Westerberg
2017-05-24 19:06                   ` Mario.Limonciello [this message]
2017-05-24 19:32                     ` Jamet, Michael
2017-05-25  7:20                       ` mika.westerberg
2017-05-25  8:04                         ` mika.westerberg
2017-05-25 12:03                           ` mika.westerberg
2017-08-11 15:13                             ` mika.westerberg
2017-05-25  7:19                     ` Mika Westerberg
2017-05-19 18:00     ` Mika Westerberg
2017-05-20  9:15   ` Levy, Amir (Jer)
2017-05-21  8:08     ` mika.westerberg
2017-05-23 13:25 ` Andy Shevchenko

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