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([2001:b07:6468:f312:63a7:c72e:ea0e:6045]) by smtp.googlemail.com with ESMTPSA id bq11sm3100115ejb.5.2022.02.10.08.42.08 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 10 Feb 2022 08:42:10 -0800 (PST) Message-ID: Date: Thu, 10 Feb 2022 17:42:08 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.5.0 Subject: Re: [PATCH MANUALSEL 5.16 8/8] KVM: x86: Report deprecated x87 features in supported CPUID Content-Language: en-US To: Sasha Levin , linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Jim Mattson , Aaron Lewis , tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, kvm@vger.kernel.org References: <20220209185635.48730-1-sashal@kernel.org> <20220209185635.48730-8-sashal@kernel.org> From: Paolo Bonzini In-Reply-To: <20220209185635.48730-8-sashal@kernel.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2/9/22 19:56, Sasha Levin wrote: > From: Jim Mattson > > [ Upstream commit e3bcfda012edd3564e12551b212afbd2521a1f68 ] Acked-by: Paolo Bonzini Paolo > CPUID.(EAX=7,ECX=0):EBX.FDP_EXCPTN_ONLY[bit 6] and > CPUID.(EAX=7,ECX=0):EBX.ZERO_FCS_FDS[bit 13] are "defeature" > bits. Unlike most of the other CPUID feature bits, these bits are > clear if the features are present and set if the features are not > present. These bits should be reported in KVM_GET_SUPPORTED_CPUID, > because if these bits are set on hardware, they cannot be cleared in > the guest CPUID. Doing so would claim guest support for a feature that > the hardware doesn't support and that can't be efficiently emulated. > > Of course, any software (e.g WIN87EM.DLL) expecting these features to > be present likely predates these CPUID feature bits and therefore > doesn't know to check for them anyway. > > Aaron Lewis added the corresponding X86_FEATURE macros in > commit cbb99c0f5887 ("x86/cpufeatures: Add FDP_EXCPTN_ONLY and > ZERO_FCS_FDS"), with the intention of reporting these bits in > KVM_GET_SUPPORTED_CPUID, but I was unable to find a proposed patch on > the kvm list. > > Opportunistically reordered the CPUID_7_0_EBX capability bits from > least to most significant. > > Cc: Aaron Lewis > Signed-off-by: Jim Mattson > Message-Id: <20220204001348.2844660-1-jmattson@google.com> > Signed-off-by: Paolo Bonzini > Signed-off-by: Sasha Levin > --- > arch/x86/kvm/cpuid.c | 13 +++++++------ > 1 file changed, 7 insertions(+), 6 deletions(-) > > diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c > index add8f58d686e3..bf18679757c70 100644 > --- a/arch/x86/kvm/cpuid.c > +++ b/arch/x86/kvm/cpuid.c > @@ -532,12 +532,13 @@ void kvm_set_cpu_caps(void) > ); > > kvm_cpu_cap_mask(CPUID_7_0_EBX, > - F(FSGSBASE) | F(SGX) | F(BMI1) | F(HLE) | F(AVX2) | F(SMEP) | > - F(BMI2) | F(ERMS) | F(INVPCID) | F(RTM) | 0 /*MPX*/ | F(RDSEED) | > - F(ADX) | F(SMAP) | F(AVX512IFMA) | F(AVX512F) | F(AVX512PF) | > - F(AVX512ER) | F(AVX512CD) | F(CLFLUSHOPT) | F(CLWB) | F(AVX512DQ) | > - F(SHA_NI) | F(AVX512BW) | F(AVX512VL) | 0 /*INTEL_PT*/ > - ); > + F(FSGSBASE) | F(SGX) | F(BMI1) | F(HLE) | F(AVX2) | > + F(FDP_EXCPTN_ONLY) | F(SMEP) | F(BMI2) | F(ERMS) | F(INVPCID) | > + F(RTM) | F(ZERO_FCS_FDS) | 0 /*MPX*/ | F(AVX512F) | > + F(AVX512DQ) | F(RDSEED) | F(ADX) | F(SMAP) | F(AVX512IFMA) | > + F(CLFLUSHOPT) | F(CLWB) | 0 /*INTEL_PT*/ | F(AVX512PF) | > + F(AVX512ER) | F(AVX512CD) | F(SHA_NI) | F(AVX512BW) | > + F(AVX512VL)); > > kvm_cpu_cap_mask(CPUID_7_ECX, > F(AVX512VBMI) | F(LA57) | F(PKU) | 0 /*OSPKE*/ | F(RDPID) |