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AJvYcCWa62/wyV144KjtV8OdMHa22N89H6CGMmWzaip9qzZ1h+nDGVhslQfNa21cDl++05AB1BsignhQB4+DeAM=@vger.kernel.org X-Gm-Message-State: AOJu0YyimlVtNhtiFG1vT1CL/4gDSYJl2jCbSEScj1/NWvST/UXBSHmt H5+bZ1UHJ7lWShTiUV1dZR/4+1J0Swy+AWPcjTNlqCbVAuXkssqzax6Mc5/zn9dEQSjp4nzhM5V exXhu3w== X-Google-Smtp-Source: AGHT+IHaSnady74DJ1oEcQaHcxLA4uOPiZb6C4vhozW1nZbyNOH4GbF0OP/WL2CRSWsgv9G05aJ9MA== X-Received: by 2002:a5d:4388:0:b0:368:334d:aad4 with SMTP id ffacd0b85a97d-378895b7bdbmr2264093f8f.4.1725638033585; Fri, 06 Sep 2024 08:53:53 -0700 (PDT) Received: from [192.168.0.20] ([148.56.230.39]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-42ca06005bbsm24296915e9.30.2024.09.06.08.53.52 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 06 Sep 2024 08:53:53 -0700 (PDT) Message-ID: Date: Fri, 6 Sep 2024 17:53:52 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 2/2] arm64: dts: s32g2: Disable support for SD/eMMC UHS mode To: Ciprian Costea , Chester Lin , Ghennadi Procopciuc , Shawn Guo , Sascha Hauer , Fabio Estevam , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Pengutronix Kernel Team , linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, NXP S32 Linux Team References: <20240830113347.4048370-1-ciprianmarian.costea@oss.nxp.com> <20240830113347.4048370-3-ciprianmarian.costea@oss.nxp.com> Content-Language: en-US, ca-ES, es-ES From: Matthias Brugger Autocrypt: addr=mbrugger@suse.com; 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charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 30/08/2024 13:33, Ciprian Costea wrote: > From: Ciprian Marian Costea > > Disable SD/eMMC UHS modes for NXP boards which do not set VCCQ voltage > supply to 1.8V by default, such as S32G274A-EVB and S32G274A-RDB2. > > Signed-off-by: Ciprian Marian Costea Reviewed-by: Matthias Brugger > --- > arch/arm64/boot/dts/freescale/s32g274a-evb.dts | 1 + > arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts | 9 +++++++++ > 2 files changed, 10 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/s32g274a-evb.dts b/arch/arm64/boot/dts/freescale/s32g274a-evb.dts > index 7ab917f547ef..b9a119eea2b7 100644 > --- a/arch/arm64/boot/dts/freescale/s32g274a-evb.dts > +++ b/arch/arm64/boot/dts/freescale/s32g274a-evb.dts > @@ -39,5 +39,6 @@ &usdhc0 { > pinctrl-1 = <&pinctrl_usdhc0_100mhz>; > pinctrl-2 = <&pinctrl_usdhc0_200mhz>; > disable-wp; > + no-1-8-v; > status = "okay"; > }; > diff --git a/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts b/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts > index 8739f63771bc..aaa61a8ad0da 100644 > --- a/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts > +++ b/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts > @@ -45,5 +45,14 @@ &usdhc0 { > pinctrl-1 = <&pinctrl_usdhc0_100mhz>; > pinctrl-2 = <&pinctrl_usdhc0_200mhz>; > disable-wp; > + /* Remove no-1-8-v to enable higher speed modes for SD card. > + * However, this is not enough to enable HS400 or HS200 modes for eMMC. > + * In this case, the position of the resistor R797 must be changed > + * from A to B before removing the property. > + * If the property is removed without changing the resistor position, > + * HS*00 may be enabled, but the interface might be unstable because of > + * the wrong VCCQ voltage applied to the eMMC. > + */ > + no-1-8-v; > status = "okay"; > };