From: Suzuki K Poulose <suzuki.poulose@arm.com>
To: Anshuman Khandual <anshuman.khandual@arm.com>,
linux-arm-kernel@lists.infradead.org
Cc: Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>, Mike Leach <mike.leach@linaro.org>,
James Clark <james.clark@arm.com>, Leo Yan <leo.yan@linaro.org>,
Jonathan Corbet <corbet@lwn.net>,
linux-doc@vger.kernel.org, coresight@lists.linaro.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH V5 - RESEND 2/3] coresight: etm: Make cycle count threshold user configurable
Date: Wed, 20 Sep 2023 10:22:33 +0100 [thread overview]
Message-ID: <e29f83cc-6a00-0e5a-20ca-55d39dc2e3a3@arm.com> (raw)
In-Reply-To: <20230915093649.435163-3-anshuman.khandual@arm.com>
On 15/09/2023 10:36, Anshuman Khandual wrote:
> Cycle counting is enabled, when requested and supported but with a default
> threshold value ETM_CYC_THRESHOLD_DEFAULT i.e 0x100 getting into TRCCCCTLR,
> representing the minimum interval between cycle count trace packets.
minor nit:
When Cycle counting is enabled, we use a default threshold value (0x100)
for the instruction trace cycle counting.
>
> This makes cycle threshold user configurable, from the user space via perf
> event attributes. Although it falls back using ETM_CYC_THRESHOLD_DEFAULT,
> in case no explicit request.
Minor nit:
This patch makes the cycle threshold user configurable via perf event
attributes( 'cc_threshold' => event->attr.config3[11:0] ), falling back
to the the current default if unspecified.
> As expected it creates a sysfs file as well.
>
> /sys/bus/event_source/devices/cs_etm/format/cc_threshold
>
> New 'cc_threshold' uses 'event->attr.config3' as no more space is available
> in 'event->attr.config1' or 'event->attr.config2'.
Trim the above part.
Rest looks fine to me.
Suzuki
next prev parent reply other threads:[~2023-09-20 9:22 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-15 9:36 [PATCH V5 - RESEND 0/3] " Anshuman Khandual
2023-09-15 9:36 ` [PATCH V5 - RESEND 1/3] coresight: etm: Override TRCIDR3.CCITMIN on errata affected cpus Anshuman Khandual
2023-09-19 11:06 ` Mike Leach
2023-09-19 11:26 ` Suzuki K Poulose
2023-09-20 6:40 ` Anshuman Khandual
2023-09-20 8:49 ` Mike Leach
2023-09-20 9:11 ` Suzuki K Poulose
2023-09-15 9:36 ` [PATCH V5 - RESEND 2/3] coresight: etm: Make cycle count threshold user configurable Anshuman Khandual
2023-09-19 11:07 ` Mike Leach
2023-09-20 9:22 ` Suzuki K Poulose [this message]
2023-09-20 10:44 ` Anshuman Khandual
2023-09-15 9:36 ` [PATCH V5 - RESEND 3/3] Documentation: coresight: Add cc_threshold tunable Anshuman Khandual
2023-09-20 9:25 ` Suzuki K Poulose
2023-09-20 10:41 ` Anshuman Khandual
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