Re: Cache-aware scheduling does not work well with amd big/little cores

[Klaus Kusche <klaus.kusche@computerix.info>]

On 24/09/2026 01:47, Tim Chen wrote:
> Hi Klaus,
> 
> I wonder if you can try this alternate patch to Chen Yu's.
> This patch does not require turning off cache aware scheduling
> entirely as in the previous patch when using the asym packing
> mechanism to prioritize big core.

Hello,

1.) This patch applies with quite some fuzz to 7.2.7 (for example, 
the context of the -10847,6+10849,10 hunk is obviously different), 
and the resulting fair.c fails to compile:
call to undeclared function 'sched_use_asym_prio'
conflicting types for 'sched_use_asym_prio'
(sched_use_asym_prio is called before being declared)
use of undeclared identifier 'env'

2.) As far as I know, "inline" does not look ahead in C.
So I think the call to sched_asym you added in hunk -10847,6+10849,10
will result in a real call, not in inline code
(at least without optimization), because the code of sched_asym
is not yet known at the position of that call.

-- 
Klaus Kusche

> From 7bad1c19317e08d398fa36d66940867110bdd037 Mon Sep 17 00:00:00 2001
> From: Tim Chen <tim.c.chen@linux.intel.com>
> Date: Wed, 23 Sep 2026 14:28:40 -0700
> Subject: [PATCH] sched/cache: Honor asym packing over cache aware scheduling
>  on hybrid system
> 
> A regression was reported on an AMD Ryzen AI HX 370 running a cache
> intensive Clang full-LTO link. The little cores run at a much lower
> frequency (3.3 GHz vs 5.1 GHz) and have only half of the L3 cache
> (8 MB vs 16 MB), so pinning such a task to the little-core LLC hurts
> twice, and full-LTO builds slow down dramatically compared to
> pre-cache-aware-scheduling kernels.
> 
> Asym packing and cache aware scheduling express conflicting placement
> strategy. Asym packing wants a task to run on the highest priority
> CPU, whereas CAS wants to co-locate the tasks of a process on one LLC
> regardless of the priority of CPUs in that LLC. When asym packing
> is turned on, it is trying to migrate task to an empty core that has
> higher priority than source cpu, let asym packing win.
> 
> Reported-by: Klaus Kusche <klaus.kusche@computerix.info>
> Closes: https://lore.kernel.org/lkml/2180ea5a-eb28-4152-8d4d-cd00b0c24b2e@computerix.info/
> Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com>
> ---
>  kernel/sched/fair.c | 21 ++++++++++++++++++---
>  1 file changed, 18 insertions(+), 3 deletions(-)
> 
> diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c
> index f265de8721db..89eed4fbc4e2 100644
> --- a/kernel/sched/fair.c
> +++ b/kernel/sched/fair.c
> @@ -10823,6 +10823,8 @@ static inline bool task_misfits_asym_cpu(struct lb_env *env, struct task_struct
>  	return false;
>  }
>  
> +static inline bool sched_asym(struct sched_domain *sd, int dst_cpu, int src_cpu);
> +
>  /*
>   * Check if task p can migrate from source LLC to
>   * destination LLC in terms of cache aware load balance.
> @@ -10847,6 +10849,10 @@ static enum llc_mig can_migrate_llc_task(struct lb_env *env,
>  	if (cpu < 0 || cpus_share_cache(src_cpu, dst_cpu))
>  		return mig_unrestricted;
>  
> +	/* Prioritize asym packing over cache awareness */
> +	if (sched_asym(env->sd, dst_cpu, src_cpu))
> +		return mig_unrestricted;
> +
>  	/* skip cache aware load balance for too many threads */
>  	if (invalid_llc_nr(grp, p, dst_cpu) ||
>  	    exceed_llc_capacity(grp, dst_cpu)) {
> @@ -12043,6 +12049,15 @@ static inline bool llc_balance(struct lb_env *env, struct sg_lb_stats *sgs,
>  	    sgs->group_misfit_task_load)
>  		return false;
>  
> +	/*
> +	 * On asym packing domains, if the destination CPU
> +	 * has higher priority than all CPUs in the source group,
> +	 * prioritize asym packing.
> +	 */ 
> +	if ((env->sd->flags & SD_ASYM_PACKING) &&
> +	    sgs->group_asym_packing)
> +		return false;
> +
>  	/*
>  	 * Skip cache aware tagging if nr_balanced_failed is sufficiently high.
>  	 * Threshold of cache_nice_tries is set to 1 higher than nr_balance_failed
> @@ -13458,12 +13473,12 @@ static int need_active_balance(struct lb_env *env)
>  {
>  	struct sched_domain *sd = env->sd;
>  
> -	if (alb_break_llc(env))
> -		return 0;
> -
>  	if (asym_active_balance(env))
>  		return 1;
>  
> +	if (alb_break_llc(env))
> +		return 0;
> +
>  	if (imbalanced_active_balance(env))
>  		return 1;
>