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Wed, 29 Oct 2025 23:24:43 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFJz1GrisRyN7i/NmCFoFsgU5+BoDtItFURjecEFsMAgMf5fYaBLHcaaSAGXDnvsc0wTyLO2A== X-Received: by 2002:a17:903:2342:b0:27e:ed58:25e5 with SMTP id d9443c01a7336-294ee363bb2mr22404175ad.24.1761805482652; Wed, 29 Oct 2025 23:24:42 -0700 (PDT) Received: from [10.218.35.249] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-29498d09a33sm171725965ad.32.2025.10.29.23.24.38 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 29 Oct 2025 23:24:42 -0700 (PDT) Message-ID: Date: Thu, 30 Oct 2025 11:54:36 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 2/4] clk: qcom: ecpricc-qdu100: Add mem_enable_mask to the clock memory branch To: Konrad Dybcio , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Ajit Pandey , Imran Shaik , Jagadeesh Kona References: <20251024-sm8750-videocc-v2-v3-0-6286bbda3c8e@oss.qualcomm.com> <20251024-sm8750-videocc-v2-v3-2-6286bbda3c8e@oss.qualcomm.com> <102d9042-49cb-4aff-8b93-a882ed8da27c@oss.qualcomm.com> Content-Language: en-US From: Taniya Das In-Reply-To: <102d9042-49cb-4aff-8b93-a882ed8da27c@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMDMwMDA1MCBTYWx0ZWRfX5qKR6RHgLOEa /DQTqqPsUdKk2kYyT5/MQv0R4h+/Csri14yUZe54bmhiCoBHqzTciaTkWPtJ0Z3XfncuHchk565 5pBh/8EsYGB75pco0MB8znkktV4Df/ktYVkShOAH9TSJi9sV7KQguHHtF7MDtAsEvD1XfSm/Qla dZHfEqnkXW5ED6ByI4Y9Z1LntbKhgmdSrmQg5j+XxAilLG3Fhc9HPUA+fQnIb4svcyD2izYVAng yt+0dj1WAsUSeFpADNnzzijyBr/a7i+z+yAbkx4JhWaREdeLpiYbE4mcuukfbSp7be7yY2o8JvC ienjQYsYp8TDacq2BzkeHdISqGI6rjPaNbZuvK/8KOTHD5sDg5MMgh0K8dQkAGMj9tGrVXjl6gA lpzekaOAnKIEoanFzrX0+9xX+FDIDw== X-Authority-Analysis: v=2.4 cv=S8XUAYsP c=1 sm=1 tr=0 ts=690304ab cx=c_pps a=cmESyDAEBpBGqyK7t0alAg==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=x6icFKpwvdMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=FkIjl_B119Hb-vYOz_IA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=1OuFwYUASf3TG4hYMiVC:22 X-Proofpoint-GUID: Y5N8MJqRkuLOXoS210HtxXkRdBLdC_LH X-Proofpoint-ORIG-GUID: Y5N8MJqRkuLOXoS210HtxXkRdBLdC_LH X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-10-30_01,2025-10-29_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 malwarescore=0 spamscore=0 bulkscore=0 clxscore=1015 phishscore=0 priorityscore=1501 impostorscore=0 lowpriorityscore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2510300050 On 10/24/2025 2:09 PM, Konrad Dybcio wrote: > On 10/24/25 6:24 AM, Taniya Das wrote: >> Add the newly introduced 'mem_enable_mask' to the memory control branch >> clocks of ECPRI clock controller to align to the new mem_ops handling. >> >> Signed-off-by: Taniya Das >> --- > > This probably fixes some ugly issue, could you please mention what > the impact/problem is? > Konrad, this isn’t an issue. Previously, the ECPRI clock controller’s mem_ops clocks used the mem_enable_ack_mask bit directly for both setting and polling. However, this approach didn’t apply to newer mem_ops clocks. Based on the feedback from v2, I’ve refactored the mem_ops code to handle these cases more cleanly, which required updating the ECPRI clocks as well. -- Thanks, Taniya Das