From: Paolo Bonzini <pbonzini@redhat.com>
To: Jim Mattson <jmattson@google.com>,
Vitaly Kuznetsov <vkuznets@redhat.com>
Cc: "kvm list" <kvm@vger.kernel.org>,
"Radim Krčmář" <rkrcmar@redhat.com>,
"the arch/x86 maintainers" <x86@kernel.org>,
LKML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH RFC] x86/kvm/lapic: always disable MMIO interface in x2APIC mode
Date: Fri, 27 Jul 2018 19:00:38 +0200 [thread overview]
Message-ID: <e3b7080f-b788-048b-6f3a-e1a90e4206b7@redhat.com> (raw)
In-Reply-To: <CALMp9eSaiw7wMMhzKZQpM141h6zEz=shu5P++BerbQBTVyFdYA@mail.gmail.com>
On 27/07/2018 18:48, Jim Mattson wrote:
> On a physical machine, I would expect the default local APIC page to
> fall in the PCI hole, so it would be correct to sink writes and to
> return all ones for reads. Does qemu implement a PCI hole, and does
> this address fall into it?
It does implement a PCI hole, but when using the kernel LAPIC it expects
that only devices write to that range; therefore that address doesn't
fall into the PCI hole, and instead it generates an MSIs.
Paolo
next prev parent reply other threads:[~2018-07-27 17:00 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-27 14:44 Vitaly Kuznetsov
2018-07-27 16:48 ` Jim Mattson
2018-07-27 17:00 ` Paolo Bonzini [this message]
2018-07-30 9:14 ` Vitaly Kuznetsov
2018-08-02 11:54 ` Paolo Bonzini
2018-08-02 13:30 ` Vitaly Kuznetsov
2018-08-02 13:34 ` Paolo Bonzini
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