From: Krzysztof Kozlowski <krzk@kernel.org>
To: Bastien Curutchet <bastien.curutchet@bootlin.com>,
Santosh Shilimkar <ssantosh@kernel.org>,
Miquel Raynal <miquel.raynal@bootlin.com>,
Richard Weinberger <richard@nod.at>,
Vignesh Raghavendra <vigneshr@ti.com>
Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Herve Codina <herve.codina@bootlin.com>,
Christopher Cordahi <christophercordahi@nanometrics.ca>
Subject: Re: [PATCH v4 04/10] memory: ti-aemif: Create aemif_check_cs_timings()
Date: Thu, 21 Nov 2024 11:28:01 +0100 [thread overview]
Message-ID: <e3b8366d-b365-43a3-8f40-c2374ff9e8bf@kernel.org> (raw)
In-Reply-To: <20241115132631.264609-5-bastien.curutchet@bootlin.com>
On 15/11/2024 14:26, Bastien Curutchet wrote:
> aemif_calc_rate() check the validity of a new computed timing against a
> 'max' value given as input. This isn't convenient if we want to check
> the CS timing configuration somewhere else in the code.
>
> Wrap the verification of all the chip select's timing configuration into a
> single function to ease its exportation in upcoming patches.
> Remove the 'max' input from aemif_calc_rate() as it's no longer used.
>
> Signed-off-by: Bastien Curutchet <bastien.curutchet@bootlin.com>
> ---
> drivers/memory/ti-aemif.c | 107 +++++++++++++++++---------------------
> 1 file changed, 49 insertions(+), 58 deletions(-)
>
> diff --git a/drivers/memory/ti-aemif.c b/drivers/memory/ti-aemif.c
> index aec6d6464efa..5c1c6f95185f 100644
> --- a/drivers/memory/ti-aemif.c
> +++ b/drivers/memory/ti-aemif.c
> @@ -132,18 +132,48 @@ struct aemif_device {
> struct aemif_cs_data cs_data[NUM_CS];
> };
>
> +/**
> + * aemif_check_cs_timings - Check the validity of a CS timing configuration.
> + * @timings: timings configuration
> + *
> + * @return: 0 if the timing configuration is valid, negative error number otherwise.
> + */
> +static int aemif_check_cs_timings(struct aemif_cs_timings *timings)
> +{
> + if (timings->ta > TA_MAX)
> + return -EINVAL;
> +
> + if (timings->rhold > RHOLD_MAX)
> + return -EINVAL;
> +
> + if (timings->rstrobe > RSTROBE_MAX)
> + return -EINVAL;
> +
> + if (timings->rsetup > RSETUP_MAX)
> + return -EINVAL;
> +
> + if (timings->whold > WHOLD_MAX)
> + return -EINVAL;
> +
> + if (timings->wstrobe > WSTROBE_MAX)
> + return -EINVAL;
> +
> + if (timings->wsetup > WSETUP_MAX)
> + return -EINVAL;
> +
> + return 0;
> +}
> +
> /**
> * aemif_calc_rate - calculate timing data.
> * @pdev: platform device to calculate for
> * @wanted: The cycle time needed in nanoseconds.
> * @clk: The input clock rate in kHz.
> - * @max: The maximum divider value that can be programmed.
> *
> * On success, returns the calculated timing value minus 1 for easy
> * programming into AEMIF timing registers, else negative errno.
> */
> -static int aemif_calc_rate(struct platform_device *pdev, int wanted,
> - unsigned long clk, int max)
> +static int aemif_calc_rate(struct platform_device *pdev, int wanted, unsigned long clk)
> {
> int result;
>
> @@ -156,10 +186,6 @@ static int aemif_calc_rate(struct platform_device *pdev, int wanted,
> if (result < 0)
> result = 0;
>
> - /* ... But configuring tighter timings is not an option. */
> - else if (result > max)
> - result = -EINVAL;
> -
> return result;
> }
>
> @@ -249,7 +275,6 @@ static int of_aemif_parse_abus_config(struct platform_device *pdev,
> struct aemif_device *aemif = platform_get_drvdata(pdev);
> unsigned long clk_rate = aemif->clk_rate;
> struct aemif_cs_data *data;
> - int ret;
> u32 cs;
> u32 val;
>
> @@ -275,68 +300,34 @@ static int of_aemif_parse_abus_config(struct platform_device *pdev,
> aemif_get_hw_params(pdev, aemif->num_cs++);
>
> /* override the values from device node */
> - if (!of_property_read_u32(np, "ti,cs-min-turnaround-ns", &val)) {
> - ret = aemif_calc_rate(pdev, val, clk_rate, TA_MAX);
> - if (ret < 0)
> - return ret;
> -
> - data->timings.ta = ret;
> - }
> + if (!of_property_read_u32(np, "ti,cs-min-turnaround-ns", &val))
> + data->timings.ta = aemif_calc_rate(pdev, val, clk_rate);
>
You just changed these lines in patch #1. Basically this is partial
revert of #1.
Best regards,
Krzysztof
next prev parent reply other threads:[~2024-11-21 10:28 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-15 13:26 [PATCH v4 00/10] Implement setup_interface() in the DaVinci NAND controller Bastien Curutchet
2024-11-15 13:26 ` [PATCH v4 01/10] memory: ti-aemif: Store timings parameter in number of cycles - 1 Bastien Curutchet
2024-11-15 19:54 ` Miquel Raynal
2024-11-21 10:26 ` Krzysztof Kozlowski
2024-11-15 13:26 ` [PATCH v4 02/10] memory: ti-aemif: Remove unnecessary local variables Bastien Curutchet
2024-11-15 19:56 ` Miquel Raynal
2024-11-15 13:26 ` [PATCH v4 03/10] memory: ti-aemif: Wrap CS timings into a struct Bastien Curutchet
2024-11-15 19:56 ` Miquel Raynal
2024-11-21 10:25 ` Krzysztof Kozlowski
2024-11-15 13:26 ` [PATCH v4 04/10] memory: ti-aemif: Create aemif_check_cs_timings() Bastien Curutchet
2024-11-15 19:58 ` Miquel Raynal
2024-11-21 10:28 ` Krzysztof Kozlowski [this message]
2024-11-21 14:56 ` Bastien Curutchet
2024-11-15 13:26 ` [PATCH v4 05/10] memory: ti-aemif: Create aemif_set_cs_timings() Bastien Curutchet
2024-11-15 13:26 ` [PATCH v4 06/10] memory: ti-aemif: Export aemif_*_cs_timings() Bastien Curutchet
2024-11-21 10:33 ` Krzysztof Kozlowski
2024-11-21 15:33 ` Bastien Curutchet
2024-11-15 13:26 ` [PATCH v4 07/10] mtd: rawnand: davinci: Always depends on TI_AEMIF Bastien Curutchet
2024-11-15 13:26 ` [PATCH v4 08/10] mtd: rawnand: davinci: Order headers alphabetically Bastien Curutchet
2024-11-15 13:26 ` [PATCH v4 09/10] mtd: rawnand: davinci: Add clock resource Bastien Curutchet
2024-11-15 13:26 ` [PATCH v4 10/10] mtd: rawnand: davinci: Implement setup_interface() operation Bastien Curutchet
2024-11-21 10:23 ` [PATCH v4 00/10] Implement setup_interface() in the DaVinci NAND controller Krzysztof Kozlowski
2024-11-21 14:51 ` Miquel Raynal
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