From: Suzuki K Poulose <suzuki.poulose@arm.com>
To: Arnaldo Carvalho de Melo <acme@kernel.org>
Cc: mathieu.poirier@linaro.org, peterz@infradead.org,
mingo@redhat.com, linux-perf-users@vger.kernel.org,
leo.yan@linaro.org, quic_jinlmao@quicinc.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Mike Leach <mike.leach@linaro.org>,
James Clark <james.clark@arm.com>
Subject: v4: Re: [PATCH v7 00/15] coresight: Add new API to allocate trace source ID values
Date: Mon, 20 Feb 2023 16:24:39 +0000 [thread overview]
Message-ID: <e3df35fe-a00d-69ec-32ee-53c949909cab@arm.com> (raw)
In-Reply-To: <2864f28e-dd2f-5a9c-922f-5c044a864beb@arm.com>
Arnaldo
Gentle ping
On 31/01/2023 11:49, Suzuki K Poulose wrote:
> Hi Arnaldo
>
> On 24/01/2023 11:36, Suzuki K Poulose wrote:
>> Hi Arnaldo
>>
>> Gentle ping.
>>
>> On 19/01/2023 12:00, Suzuki K Poulose wrote:
>>> Hi Arnaldo,
>>>
>>> On 16/01/2023 12:49, Mike Leach wrote:
>>>> The current method for allocating trace source ID values to sources is
>>>> to use a fixed algorithm for CPU based sources of (cpu_num * 2 + 0x10).
>>>> The STM is allocated ID 0x1.
>>>>
>>>> This fixed algorithm is used in both the CoreSight driver code, and by
>>>> perf when writing the trace metadata in the AUXTRACE_INFO record.
>>>>
>>>> The method needs replacing as currently:-
>>>> 1. It is inefficient in using available IDs.
>>>> 2. Does not scale to larger systems with many cores and the algorithm
>>>> has no limits so will generate invalid trace IDs for cpu number > 44.
>>>>
>>>> Additionally requirements to allocate additional system IDs on some
>>>> systems have been seen.
>>>>
>>>> This patch set introduces an API that allows the allocation of
>>>> trace IDs
>>>> in a dynamic manner.
>>>>
>>>> Architecturally reserved IDs are never allocated, and the system is
>>>> limited to allocating only valid IDs.
>>>>
>>>> Each of the current trace sources ETM3.x, ETM4.x and STM is updated
>>>> to use
>>>> the new API.
>>>>
>>>> For the ETMx.x devices IDs are allocated on certain events
>>>> a) When using sysfs, an ID will be allocated on hardware enable, or
>>>> a read of
>>>> sysfs TRCTRACEID register and freed when the sysfs reset is written.
>>>>
>>>> b) When using perf, ID is allocated on during setup AUX event, and
>>>> freed on
>>>> event free. IDs are communicated using the AUX_OUTPUT_HW_ID packet.
>>>> The ID allocator is notified when perf sessions start and stop
>>>> so CPU based IDs are kept constant throughout any perf session.
>>>>
>>>>
>>>> Note: This patchset breaks some backward compatibility for perf
>>>> record and
>>>> perf report.
>>>>
>>>> The version of the AUXTRACE_INFO has been updated to reflect the
>>>> fact that
>>>> the trace source IDs are generated differently. This will
>>>> mean older versions of perf report cannot decode the newer file.
>>>>
>>>> Appies to coresight/next
>>>>
>>
>> ...
>>
>>>> Mike Leach (15):
>>>> coresight: trace-id: Add API to dynamically assign Trace ID values
>>>> coresight: Remove obsolete Trace ID unniqueness checks
>>>> coresight: perf: traceid: Add perf ID allocation and notifiers
>>>> coresight: stm: Update STM driver to use Trace ID API
>>>> coresight: etm4x: Update ETM4 driver to use Trace ID API
>>>> coresight: etm3x: Update ETM3 driver to use Trace ID API
>>>> coresight: etmX.X: stm: Remove trace_id() callback
>>>> coresight: trace id: Remove legacy get trace ID function.
>>>> perf: cs-etm: Move mapping of Trace ID and cpu into helper function
>>>> perf: cs-etm: Update record event to use new Trace ID protocol
>>>> kernel: events: Export perf_report_aux_output_id()
>>>> perf: cs-etm: Handle PERF_RECORD_AUX_OUTPUT_HW_ID packet
>>>> coresight: events: PERF_RECORD_AUX_OUTPUT_HW_ID used for Trace ID
>>>> coresight: trace-id: Add debug & test macros to Trace ID allocation
>>>> coresight: etm3x: docs: Alter sysfs documentation for trace id
>>>> updates
>>>
>>> I have pushed the kernel patches on this series to coresight tree
>>> next[0].
>>>
>>> I will be sending them out to Greg for v6.3. Please could you queue the
>>> perf tool changes in the series ? i.e., Patches 9,10 and 12.
>>>
>>>
>>> [0]
>>> https://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux.git/log/?h=next
>>>
>>
>> Please could you pick up the perf tool changes above ?
>
> Please could you confirm if you are able to queue the perf tool changes
> ? Or would you like me route it via coresight tree ?
>
> Kind regards
> Suzuki
>
Suzuki
next prev parent reply other threads:[~2023-02-20 16:24 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-16 12:49 Mike Leach
2023-01-16 12:49 ` [PATCH v7 01/15] coresight: trace-id: Add API to dynamically assign Trace " Mike Leach
2023-01-16 14:16 ` Suzuki K Poulose
2023-01-17 13:02 ` Mike Leach
2023-01-17 15:54 ` Suzuki K Poulose
2023-01-16 12:49 ` [PATCH v7 02/15] coresight: Remove obsolete Trace ID unniqueness checks Mike Leach
2023-01-16 12:49 ` [PATCH v7 03/15] coresight: perf: traceid: Add perf ID allocation and notifiers Mike Leach
2023-01-16 12:49 ` [PATCH v7 04/15] coresight: stm: Update STM driver to use Trace ID API Mike Leach
2023-01-16 12:49 ` [PATCH v7 05/15] coresight: etm4x: Update ETM4 " Mike Leach
2023-01-16 12:49 ` [PATCH v7 06/15] coresight: etm3x: Update ETM3 " Mike Leach
2023-01-16 12:49 ` [PATCH v7 07/15] coresight: etmX.X: stm: Remove trace_id() callback Mike Leach
2023-01-16 12:49 ` [PATCH v7 08/15] coresight: trace id: Remove legacy get trace ID function Mike Leach
2023-01-16 12:49 ` [PATCH v7 09/15] perf: cs-etm: Move mapping of Trace ID and cpu into helper function Mike Leach
2023-01-17 12:04 ` Suzuki K Poulose
2023-01-16 12:49 ` [PATCH v7 10/15] perf: cs-etm: Update record event to use new Trace ID protocol Mike Leach
2023-01-16 12:49 ` [PATCH v7 11/15] kernel: events: Export perf_report_aux_output_id() Mike Leach
2023-01-16 12:49 ` [PATCH v7 12/15] perf: cs-etm: Handle PERF_RECORD_AUX_OUTPUT_HW_ID packet Mike Leach
2023-01-16 12:49 ` [PATCH v7 13/15] coresight: events: PERF_RECORD_AUX_OUTPUT_HW_ID used for Trace ID Mike Leach
2023-01-19 11:02 ` Suzuki K Poulose
2023-01-19 12:02 ` Mike Leach
2023-01-16 12:49 ` [PATCH v7 14/15] coresight: trace-id: Add debug & test macros to Trace ID allocation Mike Leach
2023-01-16 12:49 ` [PATCH v7 15/15] coresight: etm3x: docs: Alter sysfs documentation for trace id updates Mike Leach
2023-01-16 14:22 ` Suzuki K Poulose
2023-01-19 12:00 ` [PATCH v7 00/15] coresight: Add new API to allocate trace source ID values Suzuki K Poulose
2023-01-24 11:36 ` Suzuki K Poulose
2023-01-31 11:49 ` Suzuki K Poulose
2023-02-20 16:24 ` Suzuki K Poulose [this message]
2023-02-27 10:26 ` v4: " Suzuki K Poulose
2023-03-29 4:14 ` Ganapatrao Kulkarni
2023-03-29 13:19 ` Arnaldo Carvalho de Melo
2023-03-29 16:41 ` Ganapatrao Kulkarni
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=e3df35fe-a00d-69ec-32ee-53c949909cab@arm.com \
--to=suzuki.poulose@arm.com \
--cc=acme@kernel.org \
--cc=james.clark@arm.com \
--cc=leo.yan@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-perf-users@vger.kernel.org \
--cc=mathieu.poirier@linaro.org \
--cc=mike.leach@linaro.org \
--cc=mingo@redhat.com \
--cc=peterz@infradead.org \
--cc=quic_jinlmao@quicinc.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®