Re: [PATCH] x86/mm/pat: fix effective RW computation in lookup_address_in_pgd_attr()

[Dave Hansen <dave.hansen@intel.com>]

On 7/16/26 02:18, Mike Rapoport wrote:
>> I don't really care how the issue is fixed, but this would result in less
>> code.
> But it will be slower 🙂 

What does "slower" mean here?

Does it matter in _practice_? Does it measurably slow down something an
end user might see?

Also, I thought we had tests for this gunk. But maybe we're only testing
the leaf entry permissions or something and not the upper-level
permissions. I guess we don't often muck with those so this is
relatively unlikely to have hidden real bugs.

BTW, my pre-coffee brain struggled with the changelog here:

	but _PAGE_RW is bit 1 while *rw only ever holds 0 or 1, so the

Maybe it was a 0 vs. 1 bit thing, but it still took me way too long.
Could we do something like:

_PAGE_RW is 0x2. So consider the accumulation line:

	rw &= pXd_flags(*pXd) & _PAGE_RW;

where rw=0x1 and the right side evaluates down to 0x2. It'll end up doing:

	rw = 0x1 & 0x2

and rw always ends up 0.