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Fri, 21 Nov 2025 01:14:12 -0800 (PST) Message-ID: Subject: Re: [PATCH 8/9] iio: imu: st_lsm6dsx: add event configurability on a per axis basis From: Francesco Lavra To: Andy Shevchenko Cc: Lorenzo Bianconi , Jonathan Cameron , David Lechner , Nuno =?ISO-8859-1?Q?S=E1?= , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org Date: Fri, 21 Nov 2025 10:14:06 +0100 In-Reply-To: References: <20251030072752.349633-9-flavra@baylibre.com> <5b23d077d8882d6b2a2e66817b1b6bcebc6bb5a2.camel@baylibre.com> <82bf13fd5ada664d9e4fdbc3ee453204e55d318b.camel@baylibre.com> <50107aecc446ba42e312b81e18a6ffe871fa3291.camel@baylibre.com> Organization: BayLibre Content-Type: multipart/signed; micalg="pgp-sha512"; protocol="application/pgp-signature"; boundary="=-ZIeMP/I06AU+I7WukbTm" User-Agent: Evolution 3.46.4-2 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 --=-ZIeMP/I06AU+I7WukbTm Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Thu, 2025-11-20 at 20:31 +0200, Andy Shevchenko wrote: > On Thu, Nov 20, 2025 at 03:59:18PM +0200, Andy Shevchenko wrote: > > On Thu, Nov 20, 2025 at 12:43:09PM +0100, Francesco Lavra wrote: > > > On Thu, 2025-11-20 at 10:05 +0100, Andy Shevchenko wrote: > > > > On Tue, Nov 18, 2025 at 12:01:57PM +0100, Francesco Lavra wrote: > > > > > On Tue, 2025-11-18 at 11:44 +0100, Andy Shevchenko wrote: > > > > > > On Mon, Nov 17, 2025 at 08:23:35PM +0100, Francesco Lavra > > > > > > wrote: > > > > > > > On Thu, 2025-10-30 at 15:56 +0200, Andy Shevchenko wrote: > > > > > > > > On Thu, Oct 30, 2025 at 12:23:19PM +0100, Francesco Lavra > > > > > > > > wrote: > > > > > > > > > On Thu, 2025-10-30 at 10:24 +0200, Andy Shevchenko wrote: > > > > > > > > > > On Thu, Oct 30, 2025 at 08:27:51AM +0100, Francesco > > > > > > > > > > Lavra > > > > > > > > > > wrote: >=20 > ... >=20 > > > > > > > > > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0old_enable= =3D hw->enable_event[event]; > > > > > > > > > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0new_enable= =3D state ? (old_enable | BIT(axis)) > > > > > > > > > > > : > > > > > > > > > > > (old_enable > > > > > > > > > > > & > > > > > > > > > > > ~BIT(axis)); > > > > > > > > > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0if (!!old_= enable =3D=3D !!new_enable) > > > > > > > > > >=20 > > > > > > > > > > This is an interesting check. So, old_enable and > > > > > > > > > > new_enable > > > > > > > > > > are > > > > > > > > > > _not_ > > > > > > > > > > booleans, right? > > > > > > > > > > So, this means the check test if _any_ of the bit was > > > > > > > > > > set and > > > > > > > > > > kept > > > > > > > > > > set or > > > > > > > > > > none were set > > > > > > > > > > and non is going to be set. Correct? I think a short > > > > > > > > > > comment > > > > > > > > > > would be > > > > > > > > > > good to have. > > > > > > > > >=20 > > > > > > > > > old_enable and new_enable are bit masks, but we are only > > > > > > > > > interested > > > > > > > > > in > > > > > > > > > whether any bit is set, to catch the cases where the bit > > > > > > > > > mask > > > > > > > > > goes > > > > > > > > > from > > > > > > > > > zero to non-zero and vice versa. Will add a comment. > > > > > > > >=20 > > > > > > > > If it's a true bitmask (assuming unsigned long type) then > > > > > > > > all > > > > > > > > this > > > > > > > > can be > > > > > > > > done > > > > > > > > via bitmap API calls. Otherwise you can also compare a > > > > > > > > Hamming > > > > > > > > weights of > > > > > > > > them > > > > > > > > (probably that gives even the same size of the object file, > > > > > > > > but > > > > > > > > !! > > > > > > > > instructions > > > > > > > > =C2=A0will be changed to hweight() calls (still a single > > > > > > > > assembly > > > > > > > > instr on > > > > > > > > modern > > > > > > > > =C2=A0architectures). > > > > > > >=20 > > > > > > > These are u8 variables, so we can't use the bitmap API. > > > > > >=20 > > > > > > OK. But hweight8() can still be used. > > > > > >=20 > > > > > > > And I don't > > > > > > > understand the reason for using hweight(), given that the !! > > > > > > > operators > > > > > > > would still be needed. > > > > > >=20 > > > > > > No, you won't need !! with that. > > > > >=20 > > > > > I still don't understand. Are you proposing to replace `if > > > > > (!!old_enable =3D=3D > > > > > !!new_enable)` with `if (hweight8(old_enable) =3D=3D > > > > > hweight8(new_enable))`? > > > > > That won't work, because we only need to check whether the > > > > > Hamming > > > > > weight > > > > > goes from zero to non-zero and vice versa. > > > >=20 > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 old_enable =3D hw->enable_even= t[event]; > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 new_enable =3D state ? (old_en= able | BIT(axis)) : > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0 (old_enable & ~BIT(axis)); > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (!!old_enable =3D=3D !!new_= enable) > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0 return 0; > > > >=20 > > > > If I am not mistaken this will do exactly the same in a simpler > > > > way. > > > >=20 > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0old_enable =3D hw->= enable_event[event]; > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0if (state) > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0new_enable =3D old_enable | BIT(axis); > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0else > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0new_enable =3D old_enable & ~BIT(axis); > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0if ((new_enable ^ o= ld_enable) !=3D BIT(axis)) > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0return 0; > > >=20 > > > This doesn't look right to me, if new_enable differs from old_enable > > > by > > > just one bit (which it does), then the XOR result will always have > > > this bit > > > (and no others) set, so (new_enable ^ old_enable) will always equal > > > BIT(axis). > > > We are not checking if the bit was already set or clear, when this > > > code > > > runs we already know that the bit is changing, what we are checking > > > is > > > whether all bits are zero before or after this change. > >=20 > > The check I proposed is to have a look for the cases when old_enable > > was 0 and > > the BIT(axis) is set and when the BIT(axis) was _the last_ bit in the > > mask that > > got reset. If it's not the case, the code will return 0. I think my > > check is > > correct. > >=20 > > Should I write a test case? >=20 > FWIW, https://gist.github.com/andy-shev/afe4c0e009cb3008ac613d8384aaa6eb The code in your gist produces: Initial event: 0x92, new state: True for bit 0x20 [-] 0x00 | 0x20 --> 1: handle [0] 0x92 | 0x20 --> 1: handle [1] 0x93 | 0x20 --> 1: handle [2] 0x93 | 0x20 --> 1: handle [3] 0x97 | 0x20 --> 1: handle [4] 0x9f | 0x20 --> 1: handle [5] 0x9f | 0x20 --> 1: handle [6] 0xbf | 0x20 --> 0: return [7] 0xff | 0x20 --> 0: return [-] 0xff | 0x20 --> 0: return But this is not what I need. I need "handle" to be there only when the bitmask goes from 0x00 to non-zero (in the above example, only at the first [-] iteration); all the other cases should be a "return". Likewise, if there is '&' instead of '|', I need "handle" to be there only when the bitmask goes from non-zero to 0x00. --=-ZIeMP/I06AU+I7WukbTm Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part -----BEGIN PGP SIGNATURE----- iQGzBAABCgAdFiEEhleFT5U73KMewxTm7fE7c86UNl8FAmkgLV4ACgkQ7fE7c86U Nl/Y3Av/XW7ygoTih0T8fziBumdJw46kU/oPnzwU+y6yUkYs3n8pwzEYJAdfVwuA 0pP7aGpsaMBC6J0iAfQyB9EX5rdpTS7WXVszBCy2bSgHPTUJX87b/icb3GERqb9q zEXYl+qZEfgconDuTQrtmMfBwqFUOtJ3q3CdTylt8bh0rkJDP7RNB7MfXyQswrOW Hbbz27rzQkusr7JF+oDcwkRXVbWM2AuW56H0cFwBRteDEtU49QvwZO9IotDZ0SxS FlicHEARYbbI8SWI932avg3mql9+YLZBGL3iO93CV3Hud3Bw1QhdzuGk3diezFIt Ps3JXCRhCHT46WBAKlDehvK0LIRSyoxORH5Yu29NMsQkWGPmasRldUf9cutaFhfo 3/PQvzaEGsjMi87rOVcSZjTwAbkZzO1vGzbvEO20kYbrVXj4s103esC5mi/bX2pi 3SLzlK87XJUtUZ01R2VbG2t7JKOTNDyatYfY7BOVAHGhIcwxm+eYeRa8vnCm972+ nsaT6Bay =Bv3V -----END PGP SIGNATURE----- --=-ZIeMP/I06AU+I7WukbTm--