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X-CSE-ConnectionGUID: iZMzHRBARyy75LFHdHopJA== X-CSE-MsgGUID: pYc4MCd7RVaRERYpNZN8uA== X-IronPort-AV: E=Sophos;i="6.10,205,1719903600"; d="scan'208";a="34471301" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 05 Sep 2024 07:36:54 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Thu, 5 Sep 2024 07:36:44 -0700 Received: from [10.180.116.241] (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Thu, 5 Sep 2024 07:36:41 -0700 Message-ID: Date: Thu, 5 Sep 2024 16:37:01 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] ARM: dts: microchip: sam9x60: Add missing property atmel,usart-mode Content-Language: en-US, fr-FR To: Andrei Simion , , , , , CC: , , References: <20240905093046.23428-1-andrei.simion@microchip.com> From: Nicolas Ferre Organization: microchip In-Reply-To: <20240905093046.23428-1-andrei.simion@microchip.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit On 05/09/2024 at 11:30, Andrei Simion wrote: > ~: make dtbs_check DT_SCHEMA_FILES=atmel,at91-usart.ymal > -> for all boards which inherit sam9x60.dtsi: serial@200: $nodename:0: > 'serial@200' does not match '^spi(@.*|-([0-9]|[1-9][0-9]+))?$ > serial@200: atmel,use-dma-rx: False schema does not allow True > serial@200: atmel,use-dma-tx: False schema does not allow True > serial@200: atmel,fifo-size: False schema does not allow [[16]] > -> Means : atmel,usart-mode = misses for uart: > 0,1,2,3,4,6,7,8,9,10,11,12 > > Add to uart nodes the property atmel,usart-mode to specify the driver to be > used in serial mode to be compliant to atmel,at91-usart.yaml. > > Fixes: 99c808335877 ("ARM: dts: at91: sam9x60: Add missing flexcom definitions") > Signed-off-by: Andrei Simion Thanks Andrei: Acked-by: Nicolas Ferre Best regards, Nicolas > --- > arch/arm/boot/dts/microchip/sam9x60.dtsi | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > > diff --git a/arch/arm/boot/dts/microchip/sam9x60.dtsi b/arch/arm/boot/dts/microchip/sam9x60.dtsi > index 04a6d716ecaf..0ba424bba7cc 100644 > --- a/arch/arm/boot/dts/microchip/sam9x60.dtsi > +++ b/arch/arm/boot/dts/microchip/sam9x60.dtsi > @@ -174,6 +174,7 @@ flx4: flexcom@f0000000 { > uart4: serial@200 { > compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; > reg = <0x200 0x200>; > + atmel,usart-mode = ; > interrupts = <13 IRQ_TYPE_LEVEL_HIGH 7>; > dmas = <&dma0 > (AT91_XDMAC_DT_MEM_IF(0) | > @@ -376,6 +377,7 @@ flx11: flexcom@f0020000 { > uart11: serial@200 { > compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; > reg = <0x200 0x200>; > + atmel,usart-mode = ; > interrupts = <32 IRQ_TYPE_LEVEL_HIGH 7>; > dmas = <&dma0 > (AT91_XDMAC_DT_MEM_IF(0) | > @@ -427,6 +429,7 @@ flx12: flexcom@f0024000 { > uart12: serial@200 { > compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; > reg = <0x200 0x200>; > + atmel,usart-mode = ; > interrupts = <33 IRQ_TYPE_LEVEL_HIGH 7>; > dmas = <&dma0 > (AT91_XDMAC_DT_MEM_IF(0) | > @@ -586,6 +589,7 @@ flx6: flexcom@f8010000 { > uart6: serial@200 { > compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; > reg = <0x200 0x200>; > + atmel,usart-mode = ; > interrupts = <9 IRQ_TYPE_LEVEL_HIGH 7>; > dmas = <&dma0 > (AT91_XDMAC_DT_MEM_IF(0) | > @@ -637,6 +641,7 @@ flx7: flexcom@f8014000 { > uart7: serial@200 { > compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; > reg = <0x200 0x200>; > + atmel,usart-mode = ; > interrupts = <10 IRQ_TYPE_LEVEL_HIGH 7>; > dmas = <&dma0 > (AT91_XDMAC_DT_MEM_IF(0) | > @@ -688,6 +693,7 @@ flx8: flexcom@f8018000 { > uart8: serial@200 { > compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; > reg = <0x200 0x200>; > + atmel,usart-mode = ; > interrupts = <11 IRQ_TYPE_LEVEL_HIGH 7>; > dmas = <&dma0 > (AT91_XDMAC_DT_MEM_IF(0) | > @@ -739,6 +745,7 @@ flx0: flexcom@f801c000 { > uart0: serial@200 { > compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; > reg = <0x200 0x200>; > + atmel,usart-mode = ; > interrupts = <5 IRQ_TYPE_LEVEL_HIGH 7>; > dmas = <&dma0 > (AT91_XDMAC_DT_MEM_IF(0) | > @@ -809,6 +816,7 @@ flx1: flexcom@f8020000 { > uart1: serial@200 { > compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; > reg = <0x200 0x200>; > + atmel,usart-mode = ; > interrupts = <6 IRQ_TYPE_LEVEL_HIGH 7>; > dmas = <&dma0 > (AT91_XDMAC_DT_MEM_IF(0) | > @@ -879,6 +887,7 @@ flx2: flexcom@f8024000 { > uart2: serial@200 { > compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; > reg = <0x200 0x200>; > + atmel,usart-mode = ; > interrupts = <7 IRQ_TYPE_LEVEL_HIGH 7>; > dmas = <&dma0 > (AT91_XDMAC_DT_MEM_IF(0) | > @@ -949,6 +958,7 @@ flx3: flexcom@f8028000 { > uart3: serial@200 { > compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; > reg = <0x200 0x200>; > + atmel,usart-mode = ; > interrupts = <8 IRQ_TYPE_LEVEL_HIGH 7>; > dmas = <&dma0 > (AT91_XDMAC_DT_MEM_IF(0) | > @@ -1074,6 +1084,7 @@ flx9: flexcom@f8040000 { > uart9: serial@200 { > compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; > reg = <0x200 0x200>; > + atmel,usart-mode = ; > interrupts = <15 IRQ_TYPE_LEVEL_HIGH 7>; > dmas = <&dma0 > (AT91_XDMAC_DT_MEM_IF(0) | > @@ -1125,6 +1136,7 @@ flx10: flexcom@f8044000 { > uart10: serial@200 { > compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; > reg = <0x200 0x200>; > + atmel,usart-mode = ; > interrupts = <16 IRQ_TYPE_LEVEL_HIGH 7>; > dmas = <&dma0 > (AT91_XDMAC_DT_MEM_IF(0) | > > base-commit: fdadd93817f124fd0ea6ef251d4a1068b7feceba