Re: [PATCH net v2 2/2] microchip: lan865x: fix missing Timer Increment config for Rev.B0/B1

[Vadim Fedorenko <vadim.fedorenko@linux.dev>]

On 18/08/2025 07:05, Parthiban Veerasooran wrote:
> Fix missing configuration for LAN865x silicon revisions B0 and B1 as per
> Microchip Application Note AN1760 (Rev F, June 2024).
> 
> The Timer Increment register was not being set, which is required for
> accurate timestamping. As per the application note, configure the MAC to
> set timestamping at the end of the Start of Frame Delimiter (SFD), and
> set the Timer Increment register to 40 ns (corresponding to a 25 MHz
> internal clock).
> 
> Link: https://www.microchip.com/en-us/application-notes/an1760
> 
> Fixes: 5cd2340cb6a3 ("microchip: lan865x: add driver support for Microchip's LAN865X MAC-PHY")
> Signed-off-by: Parthiban Veerasooran <parthiban.veerasooran@microchip.com>
> ---
>   .../net/ethernet/microchip/lan865x/lan865x.c  | 19 +++++++++++++++++++
>   1 file changed, 19 insertions(+)
> 
> diff --git a/drivers/net/ethernet/microchip/lan865x/lan865x.c b/drivers/net/ethernet/microchip/lan865x/lan865x.c
> index d03f5a8de58d..84c41f193561 100644
> --- a/drivers/net/ethernet/microchip/lan865x/lan865x.c
> +++ b/drivers/net/ethernet/microchip/lan865x/lan865x.c
> @@ -32,6 +32,10 @@
>   /* MAC Specific Addr 1 Top Reg */
>   #define LAN865X_REG_MAC_H_SADDR1	0x00010023
>   
> +/* MAC TSU Timer Increment Register */
> +#define LAN865X_REG_MAC_TSU_TIMER_INCR		0x00010077
> +#define MAC_TSU_TIMER_INCR_COUNT_NANOSECONDS	0x0028
> +
>   struct lan865x_priv {
>   	struct work_struct multicast_work;
>   	struct net_device *netdev;
> @@ -346,6 +350,21 @@ static int lan865x_probe(struct spi_device *spi)
>   		goto free_netdev;
>   	}
>   
> +	/* LAN865x Rev.B0/B1 configuration parameters from AN1760
> +	 * As per the Configuration Application Note AN1760 published in the
> +	 * link, https://www.microchip.com/en-us/application-notes/an1760
> +	 * Revision F (DS60001760G - June 2024), configure the MAC to set time
> +	 * stamping at the end of the Start of Frame Delimiter (SFD) and set the
> +	 * Timer Increment reg to 40 ns to be used as a 25 MHz internal clock.
> +	 */
> +	ret = oa_tc6_write_register(priv->tc6, LAN865X_REG_MAC_TSU_TIMER_INCR,
> +				    MAC_TSU_TIMER_INCR_COUNT_NANOSECONDS);
> +	if (ret) {
> +		dev_err(&spi->dev, "Failed to config TSU Timer Incr reg: %d\n",
> +			ret);
> +		goto oa_tc6_exit;
> +	}
> +
>   	/* As per the point s3 in the below errata, SPI receive Ethernet frame
>   	 * transfer may halt when starting the next frame in the same data block
>   	 * (chunk) as the end of a previous frame. The RFA field should be

Reviewed-by: Vadim Fedorenko <vadim.fedorenko@linux.dev>