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Fri, 14 Aug 2026 05:36:44 +0000 (GMT) Received: from [9.124.210.249] (unknown [9.124.210.249]) by smtpav02.fra02v.mail.ibm.com (Postfix) with ESMTP; Fri, 14 Aug 2026 05:36:44 +0000 (GMT) Message-ID: Date: Fri, 14 Aug 2026 11:06:43 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] powerpc/entry: Use hard_irq_disable() in arch_interrupt_exit_prepare() To: "Mukesh Kumar Chaurasiya (IBM)" , maddy@linux.ibm.com, mpe@ellerman.id.au, npiggin@gmail.com, chleroy@kernel.org, mchauras@linux.ibm.com, linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org Cc: Venkat Rao Bagalkote References: <20260812152035.1661781-1-mkchauras@gmail.com> Content-Language: en-US From: Shrikanth Hegde In-Reply-To: <20260812152035.1661781-1-mkchauras@gmail.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-TM-AS-GCONF: 00 X-Proofpoint-Reinject: loops=2 maxloops=12 X-Authority-Analysis: v=2.4 cv=RsP16imK c=1 sm=1 tr=0 ts=6a7ea974 cx=c_pps a=bLidbwmWQ0KltjZqbj+ezA==:117 a=bLidbwmWQ0KltjZqbj+ezA==:17 a=IkcTkHD0fZMA:10 a=Sv0fKeRqtYgA:10 a=VkNPw1HP01LnGYTKEx00:22 a=RnoormkPH1_aCDwRdu11:22 a=RzCfie-kr_QcCd8fBx8p:22 a=VwQbUJbxAAAA:8 a=VnNF1IyMAAAA:8 a=pGLkceISAAAA:8 a=oSVCPka-oEw81mTqY8MA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 X-Proofpoint-GUID: 6w2G6yLy3j83nUg8ggj-hon-knJdHvLh X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODE0MDA0MSBTYWx0ZWRfX6PkOiszOvXAE Sa4hYBnfOvLK6o1tMPvAQGX1hco/eiivRcgifJ4ACdIyKw/vPIr+aVe+uV2cSiB9eHJtxcq5ROF S8DFCaG6ODJ9SVjR0N2Z7WQV+5Jyw7koZlPWrSmPU32Z1Ba/PHVQ4Y3ehVpLuGIKdohON1D3XxE bk8YrelVbC/rG3sJ72bFZnIAZuF9kSek9cDtDNlO4xLpg0jrqIT1ifuJuSaHn8ypL4+b/M5ZXnV szSmH1CAndhLLgkLtwr8fYl8781bINorBpKldpc8jViluqz3ZXfHvWJJhJKdOsHz1BpPcV2Oeji +xtuW8ssRImrTh6xLyo/z1+AhlN2/KdcYEfvqNqKVlg47LSqUnxdTLXhpiAJS1QSKWtfnkwlPhA 8mD4e3hPjI2dJtmPWG+tij5HX37cgVJhoBaqXoKThdHzP1/3ORLBtKdHuTIrULUEg/Q66khdutP fFczFUvLB0eXAht/SXg== X-Proofpoint-ORIG-GUID: vuaINAksynpcryJfh1go3zVn3Plhaj9Q X-Proofpoint-Spam-Info: AW1haW4tMjYwODE0MDA0MSBTYWx0ZWRfXwfk8ztlaEj1t 2IpI1gtuIzW6xq7Sig47HNNaFlQ1EKxlvJoVhYx8/XA5DtTuxDxOnXyXidiPwCNXoWOVFy7nIOf aAQo7VUkLPAX0OaSBN9tm9kYA6WVkjM= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-14_02,2026-08-12_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 impostorscore=0 suspectscore=0 clxscore=1015 malwarescore=0 phishscore=0 adultscore=0 lowpriorityscore=0 priorityscore=1501 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608140041 On 8/12/26 8:50 PM, Mukesh Kumar Chaurasiya (IBM) wrote: > commit 334f3f6d7a16 ("powerpc/entry: Disable interrupts before irqentry_exit") > fixed a BUG in preempt_schedule_irq() by calling local_irq_disable() > unconditionally in arch_interrupt_exit_prepare() before irqentry_exit(). > The fix is correct in intent but uses the wrong primitive for PPC64. > > On PPC64, local_irq_disable() only sets the soft-mask > (irq_soft_mask = IRQS_DISABLED). It does not set PACA_IRQ_HARD_DIS in > irq_happened and does not clear MSR[EE]. > > This causes a continuous WARN_ON boot hang on Power11 pSeries LPARs > using the dedicated-cede cpuidle path. When the CPU wakes from H_CEDE, > interrupt_exit_kernel_prepare() calls replay_soft_interrupts(), which > dispatches pending async handlers (timer_interrupt, do_IRQ) using the > DEFINE_INTERRUPT_HANDLER_ASYNC macro. That macro calls > arch_interrupt_async_exit_prepare() -> arch_interrupt_exit_prepare() > before irqentry_exit(). With local_irq_disable(), PACA_IRQ_HARD_DIS > is not set, but next_interrupt() unconditionally asserts it: > > WARN_ON(!(local_paca->irq_happened & PACA_IRQ_HARD_DIS)); > > This fires on every replayed interrupt, looping indefinitely and > preventing boot completion. > > Fix this by replacing local_irq_disable() with hard_irq_disable(). > On PPC64, hard_irq_disable() sets irq_soft_mask to IRQS_ALL_DISABLED, > sets PACA_IRQ_HARD_DIS in irq_happened, and clears MSR[EE] — satisfying > all of: > > - lockdep_assert_irqs_disabled() in irqentry_exit_to_kernel_mode() > - next_interrupt()'s WARN_ON(!(irq_happened & PACA_IRQ_HARD_DIS)) > - preempt_schedule_irq()'s BUG_ON(!irqs_disabled()) > > On PPC32/non-64, hard_irq_disable() is equivalent to local_irq_disable(), > so there is no regression on those platforms. > This is good explanation, but what i not understanding is, why pattern of setting PACA_IRQ_HARD_DIS changed? Previous code at interrupt_exit_kernel_prepare which did local_irq_disable too. Please check where was PACA_IRQ_HARD_DIS set without GENERIC_ENTRY which was preventing this from happening? > Fixes: 334f3f6d7a16 ("powerpc/entry: Disable interrupts before irqentry_exit") > Reported-by: Venkat Rao Bagalkote > Closes: https://lore.kernel.org/all/6f9bfb0f-b14c-468e-bb9f-c157d120d0dc@linux.ibm.com/ > Signed-off-by: Mukesh Kumar Chaurasiya (IBM) > --- > arch/powerpc/include/asm/entry-common.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/powerpc/include/asm/entry-common.h b/arch/powerpc/include/asm/entry-common.h > index c5adb5006361..de64389b0815 100644 > --- a/arch/powerpc/include/asm/entry-common.h > +++ b/arch/powerpc/include/asm/entry-common.h > @@ -270,7 +270,7 @@ static inline void arch_interrupt_exit_prepare(struct pt_regs *regs) > } > > /* irqentry_exit expects to be called with interrupts disabled */ > - local_irq_disable(); > + hard_irq_disable(); > } > > static inline void arch_interrupt_async_enter_prepare(struct pt_regs *regs)