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([2a01:e0a:982:cbb0:5b00:c640:4c96:8a97]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-381c113dd95sm12652484f8f.83.2024.11.04.00.34.16 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 04 Nov 2024 00:34:17 -0800 (PST) Message-ID: Date: Mon, 4 Nov 2024 09:34:15 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird From: Neil Armstrong Reply-To: neil.armstrong@linaro.org Subject: Re: [PATCH] drm/bridge: it6505: Fix inverted reset polarity To: Chen-Yu Tsai , Andrzej Hajda , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Matthias Brugger , AngeloGioacchino Del Regno , linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, stable@vger.kernel.org References: <20241029095411.657616-1-wenst@chromium.org> Content-Language: en-US, fr Autocrypt: addr=neil.armstrong@linaro.org; keydata= xsBNBE1ZBs8BCAD78xVLsXPwV/2qQx2FaO/7mhWL0Qodw8UcQJnkrWmgTFRobtTWxuRx8WWP GTjuhvbleoQ5Cxjr+v+1ARGCH46MxFP5DwauzPekwJUD5QKZlaw/bURTLmS2id5wWi3lqVH4 BVF2WzvGyyeV1o4RTCYDnZ9VLLylJ9bneEaIs/7cjCEbipGGFlfIML3sfqnIvMAxIMZrvcl9 qPV2k+KQ7q+aXavU5W+yLNn7QtXUB530Zlk/d2ETgzQ5FLYYnUDAaRl+8JUTjc0CNOTpCeik 80TZcE6f8M76Xa6yU8VcNko94Ck7iB4vj70q76P/J7kt98hklrr85/3NU3oti3nrIHmHABEB AAHNKk5laWwgQXJtc3Ryb25nIDxuZWlsLmFybXN0cm9uZ0BsaW5hcm8ub3JnPsLAkQQTAQoA OwIbIwULCQgHAwUVCgkICwUWAgMBAAIeAQIXgBYhBInsPQWERiF0UPIoSBaat7Gkz/iuBQJk Q5wSAhkBAAoJEBaat7Gkz/iuyhMIANiD94qDtUTJRfEW6GwXmtKWwl/mvqQtaTtZID2dos04 YqBbshiJbejgVJjy+HODcNUIKBB3PSLaln4ltdsV73SBcwUNdzebfKspAQunCM22Mn6FBIxQ GizsMLcP/0FX4en9NaKGfK6ZdKK6kN1GR9YffMJd2P08EO8mHowmSRe/ExAODhAs9W7XXExw UNCY4pVJyRPpEhv373vvff60bHxc1k/FF9WaPscMt7hlkbFLUs85kHtQAmr8pV5Hy9ezsSRa GzJmiVclkPc2BY592IGBXRDQ38urXeM4nfhhvqA50b/nAEXc6FzqgXqDkEIwR66/Gbp0t3+r yQzpKRyQif3OwE0ETVkGzwEIALyKDN/OGURaHBVzwjgYq+ZtifvekdrSNl8TIDH8g1xicBYp QTbPn6bbSZbdvfeQPNCcD4/EhXZuhQXMcoJsQQQnO4vwVULmPGgtGf8PVc7dxKOeta+qUh6+ SRh3vIcAUFHDT3f/Zdspz+e2E0hPV2hiSvICLk11qO6cyJE13zeNFoeY3ggrKY+IzbFomIZY 4yG6xI99NIPEVE9lNBXBKIlewIyVlkOaYvJWSV+p5gdJXOvScNN1epm5YHmf9aE2ZjnqZGoM Mtsyw18YoX9BqMFInxqYQQ3j/HpVgTSvmo5ea5qQDDUaCsaTf8UeDcwYOtgI8iL4oHcsGtUX oUk33HEAEQEAAcLAXwQYAQIACQUCTVkGzwIbDAAKCRAWmrexpM/4rrXiB/sGbkQ6itMrAIfn M7IbRuiSZS1unlySUVYu3SD6YBYnNi3G5EpbwfBNuT3H8//rVvtOFK4OD8cRYkxXRQmTvqa3 3eDIHu/zr1HMKErm+2SD6PO9umRef8V82o2oaCLvf4WeIssFjwB0b6a12opuRP7yo3E3gTCS KmbUuLv1CtxKQF+fUV1cVaTPMyT25Od+RC1K+iOR0F54oUJvJeq7fUzbn/KdlhA8XPGzwGRy 4zcsPWvwnXgfe5tk680fEKZVwOZKIEuJC3v+/yZpQzDvGYJvbyix0lHnrCzq43WefRHI5XTT QbM0WUIBIcGmq38+OgUsMYu4NzLu7uZFAcmp6h8g Organization: Linaro In-Reply-To: <20241029095411.657616-1-wenst@chromium.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 29/10/2024 10:54, Chen-Yu Tsai wrote: > The IT6505 bridge chip has a active low reset line. Since it is a > "reset" and not an "enable" line, the GPIO should be asserted to > put it in reset and deasserted to bring it out of reset during > the power on sequence. > > The polarity was inverted when the driver was first introduced, likely > because the device family that was targeted had an inverting level > shifter on the reset line. > > The MT8186 Corsola devices already have the IT6505 in their device tree, > but the whole display pipeline is actually disabled and won't be enabled > until some remaining issues are sorted out. The other known user is > the MT8183 Kukui / Jacuzzi family; their device trees currently do not > have the IT6505 included. > > Fix the polarity in the driver while there are no actual users. > > Fixes: b5c84a9edcd4 ("drm/bridge: add it6505 driver") > Cc: > Signed-off-by: Chen-Yu Tsai > --- > drivers/gpu/drm/bridge/ite-it6505.c | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/bridge/ite-it6505.c b/drivers/gpu/drm/bridge/ite-it6505.c > index 7502a5f81557..df7ecdf0f422 100644 > --- a/drivers/gpu/drm/bridge/ite-it6505.c > +++ b/drivers/gpu/drm/bridge/ite-it6505.c > @@ -2618,9 +2618,9 @@ static int it6505_poweron(struct it6505 *it6505) > /* time interval between OVDD and SYSRSTN at least be 10ms */ > if (pdata->gpiod_reset) { > usleep_range(10000, 20000); > - gpiod_set_value_cansleep(pdata->gpiod_reset, 0); > - usleep_range(1000, 2000); > gpiod_set_value_cansleep(pdata->gpiod_reset, 1); > + usleep_range(1000, 2000); > + gpiod_set_value_cansleep(pdata->gpiod_reset, 0); > usleep_range(25000, 35000); > } > > @@ -2651,7 +2651,7 @@ static int it6505_poweroff(struct it6505 *it6505) > disable_irq_nosync(it6505->irq); > > if (pdata->gpiod_reset) > - gpiod_set_value_cansleep(pdata->gpiod_reset, 0); > + gpiod_set_value_cansleep(pdata->gpiod_reset, 1); > > if (pdata->pwr18) { > err = regulator_disable(pdata->pwr18); > @@ -3205,7 +3205,7 @@ static int it6505_init_pdata(struct it6505 *it6505) > return PTR_ERR(pdata->ovdd); > } > > - pdata->gpiod_reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW); > + pdata->gpiod_reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH); > if (IS_ERR(pdata->gpiod_reset)) { > dev_err(dev, "gpiod_reset gpio not found"); > return PTR_ERR(pdata->gpiod_reset); Reviewed-by: Neil Armstrong