From: Andrew Lunn <andrew@lunn.ch>
To: Mo Elbadry <elbadrym@google.com>
Cc: Ryan Chen <ryan_chen@aspeedtech.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
Joel Stanley <joel@jms.id.au>,
Andrew Jeffery <andrew@codeconstruct.com.au>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
"linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-aspeed@lists.ozlabs.org" <linux-aspeed@lists.ozlabs.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Rom Lemarchand <romlem@google.com>,
William Kennington <wak@google.com>,
Yuxiao Zhang <yuxiaozhang@google.com>,
"wthai@nvidia.com" <wthai@nvidia.com>,
"leohu@nvidia.com" <leohu@nvidia.com>,
"dkodihalli@nvidia.com" <dkodihalli@nvidia.com>,
"spuranik@nvidia.com" <spuranik@nvidia.com>
Subject: Re: [PATCH v12 3/3] clk: aspeed: add AST2700 clock driver
Date: Wed, 6 Aug 2025 05:03:25 +0200 [thread overview]
Message-ID: <e53edafb-bfb0-45ab-8224-7b393af4e0ad@lunn.ch> (raw)
In-Reply-To: <CAOO6b=tEigCRXZ47BMgsTvxiZdO0P32+jFhQ313O044VALgaWA@mail.gmail.com>
> > > +static const struct clk_div_table ast2700_rgmii_div_table[] = {
> > > + { 0x0, 4 },
> > > + { 0x1, 4 },
> > > + { 0x2, 6 },
> > > + { 0x3, 8 },
> > > + { 0x4, 10 },
> > > + { 0x5, 12 },
> > > + { 0x6, 14 },
> > > + { 0x7, 16 },
> > > + { 0 }
> > > +};
> > > + DIVIDER_CLK(SCU1_CLK_RGMII, "rgmii", soc1_hpll,
> > > + SCU1_CLK_SEL1, 25, 3, ast2700_rgmii_div_table),
Historically, aspeed has got RGMII delays wrong. Could you confirm
this has nothing to do with the 2ns delay needed by RGMII.
What exactly is this clock used for? RGMII needs 2.5MHz, 25MHz and
125MHz, which none of these dividers seems to provide.
Andrew
next prev parent reply other threads:[~2025-08-06 3:03 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-08 5:29 [PATCH v12 0/3] Add support for AST2700 clk driver Ryan Chen
2025-07-08 5:29 ` [PATCH v12 1/3] dt-bindings: clock: ast2700: modify soc0/1 clock define Ryan Chen
2025-07-08 5:29 ` [PATCH v12 2/3] reset: aspeed: register AST2700 reset auxiliary bus device Ryan Chen
2025-07-08 5:29 ` [PATCH v12 3/3] clk: aspeed: add AST2700 clock driver Ryan Chen
2025-07-09 6:41 ` Ryan Chen
2025-08-06 2:00 ` Mo Elbadry
2025-08-06 3:03 ` Andrew Lunn [this message]
2025-08-06 5:29 ` Ryan Chen
2025-09-01 0:14 ` Ryan Chen
2025-09-10 5:38 ` Ryan Chen
2025-09-10 14:14 ` Brian Masney
2025-09-11 9:02 ` Ryan Chen
2025-08-14 10:56 ` [PATCH v12 0/3] Add support for AST2700 clk driver Philipp Zabel
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