From: <Tudor.Ambarus@microchip.com>
To: <luisalberto@google.com>
Cc: <miquel.raynal@bootlin.com>, <richard@nod.at>, <vigneshr@ti.com>,
<mika.westerberg@linux.intel.com>, <jethro@fortanix.com>,
<bbrezillon@kernel.org>, <linux-mtd@lists.infradead.org>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] mtd: revert "spi-nor: intel: provide a range for poll_timout"
Date: Fri, 26 Jun 2020 10:57:26 +0000 [thread overview]
Message-ID: <e5f8203c-bf0a-3aee-a067-980592eab9e6@microchip.com> (raw)
In-Reply-To: <20200610224652.64336-1-luisalberto@google.com>
On 6/11/20 1:46 AM, Luis Alberto Herrera wrote:
> This change reverts aba3a882a178: "mtd: spi-nor: intel: provide a range
> for poll_timout". That change introduces a performance regression when
> reading sequentially from flash. Logging calls to intel_spi_read without
> this change we get:
>
> Start MTD read
> [ 20.045527] intel_spi_read(from=1800000, len=400000)
> [ 20.045527] intel_spi_read(from=1800000, len=400000)
> [ 282.199274] intel_spi_read(from=1c00000, len=400000)
> [ 282.199274] intel_spi_read(from=1c00000, len=400000)
> [ 544.351528] intel_spi_read(from=2000000, len=400000)
> [ 544.351528] intel_spi_read(from=2000000, len=400000)
> End MTD read
>
> With this change:
>
> Start MTD read
> [ 21.942922] intel_spi_read(from=1c00000, len=400000)
> [ 21.942922] intel_spi_read(from=1c00000, len=400000)
> [ 23.784058] intel_spi_read(from=2000000, len=400000)
> [ 23.784058] intel_spi_read(from=2000000, len=400000)
> [ 25.625006] intel_spi_read(from=2400000, len=400000)
> [ 25.625006] intel_spi_read(from=2400000, len=400000)
> End MTD read
>
> Signed-off-by: Luis Alberto Herrera <luisalberto@google.com>
> ---
> drivers/mtd/spi-nor/controllers/intel-spi.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mtd/spi-nor/controllers/intel-spi.c b/drivers/mtd/spi-nor/controllers/intel-spi.c
> index 61d2a0ad2131..2b89361a0d3a 100644
> --- a/drivers/mtd/spi-nor/controllers/intel-spi.c
> +++ b/drivers/mtd/spi-nor/controllers/intel-spi.c
> @@ -292,7 +292,7 @@ static int intel_spi_wait_hw_busy(struct intel_spi *ispi)
> u32 val;
>
> return readl_poll_timeout(ispi->base + HSFSTS_CTL, val,
> - !(val & HSFSTS_CTL_SCIP), 40,
> + !(val & HSFSTS_CTL_SCIP), 0,
Would 10 us keep the performance as it was before?
Cheers,
ta
next prev parent reply other threads:[~2020-06-26 10:57 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-10 22:46 Luis Alberto Herrera
2020-06-11 10:39 ` Mika Westerberg
2020-06-26 10:57 ` Tudor.Ambarus [this message]
2020-07-22 16:37 ` Alexander Sverdlin
2020-07-22 17:03 ` Tudor.Ambarus
2020-07-23 9:05 ` Alexander Sverdlin
2020-07-28 8:28 ` Tudor.Ambarus
2020-07-28 9:55 ` Tudor Ambarus
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