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[67.182.156.18]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-714343403b1sm3222603b3a.211.2024.08.23.09.47.19 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 23 Aug 2024 09:47:20 -0700 (PDT) Message-ID: Date: Fri, 23 Aug 2024 16:47:17 +0000 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 2/2] KVM: x86: AMD's IBPB is not equivalent to Intel's IBPB To: Sean Christopherson , Jim Mattson Cc: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Paolo Bonzini , Pawan Gupta , Daniel Sneddon , Kai Huang , Sandipan Das , linux-kernel@vger.kernel.org, kvm@vger.kernel.org References: <20240816182533.2478415-1-jmattson@google.com> <20240816182533.2478415-2-jmattson@google.com> Content-Language: en-US From: Venkatesh Srinivas In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 8/22/24 19:17, Sean Christopherson wrote: > On Fri, Aug 16, 2024, Jim Mattson wrote: >> >From Intel's documention [1], "CPUID.(EAX=07H,ECX=0):EDX[26] >> enumerates support for indirect branch restricted speculation (IBRS) >> and the indirect branch predictor barrier (IBPB)." Further, from [2], >> "Software that executed before the IBPB command cannot control the >> predicted targets of indirect branches (4) executed after the command >> on the same logical processor," where footnote 4 reads, "Note that >> indirect branches include near call indirect, near jump indirect and >> near return instructions. Because it includes near returns, it follows >> that **RSB entries created before an IBPB command cannot control the >> predicted targets of returns executed after the command on the same >> logical processor.**" [emphasis mine] >> >> On the other hand, AMD's IBPB "may not prevent return branch >> predictions from being specified by pre-IBPB branch targets" [3]. >> >> However, some AMD processors have an "enhanced IBPB" [terminology >> mine] which does clear the return address predictor. This feature is >> enumerated by CPUID.80000008:EDX.IBPB_RET[bit 30] [4]. >> >> Adjust the cross-vendor features enumerated by KVM_GET_SUPPORTED_CPUID >> accordingly. >> >> [1] https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/technical-documentation/cpuid-enumeration-and-architectural-msrs.html >> [2] https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/technical-documentation/speculative-execution-side-channel-mitigations.html#Footnotes >> [3] https://www.amd.com/en/resources/product-security/bulletin/amd-sb-1040.html >> [4] https://www.amd.com/content/dam/amd/en/documents/processor-tech-docs/programmer-references/24594.pdf >> >> Fixes: 0c54914d0c52 ("KVM: x86: use Intel speculation bugs and features as derived in generic x86 code") >> Suggested-by: Venkatesh Srinivas >> Signed-off-by: Jim Mattson > > Venkatesh, can I grab a review from you on this? You know this way better than > I do, and I honestly don't feel like reading mitigation disclosures right now :-) Got lost in my mailbox! Reviewed-by: Venkatesh Srinivas > >> --- >> v2: Use IBPB_RET to identify semantic equality (Venkatesh) >> >> arch/x86/kvm/cpuid.c | 8 ++++++-- >> 1 file changed, 6 insertions(+), 2 deletions(-) >> >> diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c >> index 2617be544480..044bdc9e938b 100644 >> --- a/arch/x86/kvm/cpuid.c >> +++ b/arch/x86/kvm/cpuid.c >> @@ -690,7 +690,9 @@ void kvm_set_cpu_caps(void) >> kvm_cpu_cap_set(X86_FEATURE_TSC_ADJUST); >> kvm_cpu_cap_set(X86_FEATURE_ARCH_CAPABILITIES); >> >> - if (boot_cpu_has(X86_FEATURE_IBPB) && boot_cpu_has(X86_FEATURE_IBRS)) >> + if (boot_cpu_has(X86_FEATURE_AMD_IBPB_RET) && >> + boot_cpu_has(X86_FEATURE_AMD_IBPB) && >> + boot_cpu_has(X86_FEATURE_AMD_IBRS)) >> kvm_cpu_cap_set(X86_FEATURE_SPEC_CTRL); >> if (boot_cpu_has(X86_FEATURE_STIBP)) >> kvm_cpu_cap_set(X86_FEATURE_INTEL_STIBP); >> @@ -759,8 +761,10 @@ void kvm_set_cpu_caps(void) >> * arch/x86/kernel/cpu/bugs.c is kind enough to >> * record that in cpufeatures so use them. >> */ >> - if (boot_cpu_has(X86_FEATURE_IBPB)) >> + if (boot_cpu_has(X86_FEATURE_IBPB)) { >> kvm_cpu_cap_set(X86_FEATURE_AMD_IBPB); >> + kvm_cpu_cap_set(X86_FEATURE_AMD_IBPB_RET); >> + } >> if (boot_cpu_has(X86_FEATURE_IBRS)) >> kvm_cpu_cap_set(X86_FEATURE_AMD_IBRS); >> if (boot_cpu_has(X86_FEATURE_STIBP)) >> -- >> 2.46.0.184.g6999bdac58-goog >>