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Tue, 10 Nov 2026 07:29:49 -0800 (PST) Received: from [192.168.1.3] ([37.18.141.193]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4ba02345d22sm81654185e9.1.2026.11.10.07.29.48 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 10 Nov 2026 07:29:48 -0800 (PST) Message-ID: Date: Tue, 10 Nov 2026 15:29:47 +0000 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 05/23] coresight: trbe: Validate perf handle before using sink data To: Leo Yan Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, coresight@lists.linaro.org, Suzuki K Poulose , Mike Leach , Alexander Shishkin , Anshuman Khandual , Tamas Petz , Tamas Zsoldos , Suyash Mahar , Amir Ayupov References: <20261016-trbe_enable_disable_irq_handle_refactor-v2-0-3f57cf3199b1@arm.com> <20261016-trbe_enable_disable_irq_handle_refactor-v2-5-3f57cf3199b1@arm.com> Content-Language: en-US From: James Clark In-Reply-To: <20261016-trbe_enable_disable_irq_handle_refactor-v2-5-3f57cf3199b1@arm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 16/10/2026 17:55, Leo Yan wrote: > The TRBE IRQ handler calls etm_perf_sink_config(handle) before > validating the per-CPU perf handle and its AUX transaction. This may > dereference a NULL handle after disabling TRBE or access stale sink > data after perf_aux_output_end(). > > Validate the handle and AUX transaction before accessing the sink > configuration. Move the local buffer lookup closer to its use. > Remove the warning for a NULL handle, which is expected after > disabling TRBE. > > Signed-off-by: Leo Yan > --- > drivers/hwtracing/coresight/coresight-trbe.c | 15 ++++++++------- > 1 file changed, 8 insertions(+), 7 deletions(-) > > diff --git a/drivers/hwtracing/coresight/coresight-trbe.c b/drivers/hwtracing/coresight/coresight-trbe.c > index 91fbdbad3676ffae399df0b4d4ddcd603a40e86c..a7c1037a048f5236598f8f3a7cc4f47bff9d329c 100644 > --- a/drivers/hwtracing/coresight/coresight-trbe.c > +++ b/drivers/hwtracing/coresight/coresight-trbe.c > @@ -1150,12 +1150,18 @@ static irqreturn_t arm_trbe_irq_handler(int irq, void *dev) > { > struct perf_output_handle **handle_ptr = dev; > struct perf_output_handle *handle = *handle_ptr; > - struct trbe_buf *buf = etm_perf_sink_config(handle); > + struct trbe_buf *buf; > enum trbe_fault_action act; > u64 status; > bool truncated = false; > u64 trfcr; > > + if (!handle || !perf_get_aux(handle)) > + return IRQ_NONE; > + > + if (!is_perf_trbe(handle)) > + return IRQ_NONE; > + > /* Reads to TRBSR_EL1 is fine when TRBE is active */ > status = read_sysreg_s(SYS_TRBSR_EL1); > /* > @@ -1171,16 +1177,11 @@ static irqreturn_t arm_trbe_irq_handler(int irq, void *dev) > * Ensure the trace is visible to the CPUs and > * any external aborts have been resolved. > */ > + buf = etm_perf_sink_config(handle); > trbe_drain_and_disable_local(buf->cpudata); > clr_trbe_irq(); > isb(); > > - if (WARN_ON_ONCE(!handle) || !perf_get_aux(handle)) > - return IRQ_NONE; > - > - if (!is_perf_trbe(handle)) > - return IRQ_NONE; > - > act = trbe_get_fault_act(handle, status); > switch (act) { > case TRBE_FAULT_ACT_WRAP: > Reviewed-by: James Clark