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Tue, 15 Apr 2025 04:36:05 -0700 (PDT) Received: from [192.168.10.48] ([176.206.109.83]) by smtp.googlemail.com with ESMTPSA id 5b1f17b1804b1-43f2338dc13sm213154095e9.3.2025.04.15.04.36.04 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 15 Apr 2025 04:36:04 -0700 (PDT) Message-ID: Date: Tue, 15 Apr 2025 13:36:02 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 02/67] KVM: x86: Reset IRTE to host control if *new* route isn't postable To: Sean Christopherson , Sairaj Kodilkar Cc: Joerg Roedel , David Woodhouse , Lu Baolu , kvm@vger.kernel.org, iommu@lists.linux.dev, linux-kernel@vger.kernel.org, Maxim Levitsky , Joao Martins , David Matlack , Vasant Hegde , Naveen N Rao References: <20250404193923.1413163-1-seanjc@google.com> <20250404193923.1413163-3-seanjc@google.com> From: Paolo Bonzini Content-Language: en-US Autocrypt: addr=pbonzini@redhat.com; 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charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 4/11/25 16:16, Sean Christopherson wrote: > On Fri, Apr 11, 2025, Sairaj Kodilkar wrote: >> On 4/5/2025 1:08 AM, Sean Christopherson wrote: >>> @@ -991,7 +967,36 @@ int avic_pi_update_irte(struct kvm *kvm, unsigned int host_irq, >>> } >>> } >>> - ret = 0; >>> + if (enable_remapped_mode) { >>> + /* Use legacy mode in IRTE */ >>> + struct amd_iommu_pi_data pi; >>> + >>> + /** >>> + * Here, pi is used to: >>> + * - Tell IOMMU to use legacy mode for this interrupt. >>> + * - Retrieve ga_tag of prior interrupt remapping data. >>> + */ >>> + pi.prev_ga_tag = 0; >>> + pi.is_guest_mode = false; >>> + ret = irq_set_vcpu_affinity(host_irq, &pi); >>> + >>> + /** >>> + * Check if the posted interrupt was previously >>> + * setup with the guest_mode by checking if the ga_tag >>> + * was cached. If so, we need to clean up the per-vcpu >>> + * ir_list. >>> + */ >>> + if (!ret && pi.prev_ga_tag) { >>> + int id = AVIC_GATAG_TO_VCPUID(pi.prev_ga_tag); >>> + struct kvm_vcpu *vcpu; >>> + >>> + vcpu = kvm_get_vcpu_by_id(kvm, id); >>> + if (vcpu) >>> + svm_ir_list_del(to_svm(vcpu), &pi); >>> + } >>> + } else { >>> + ret = 0; >>> + } >> >> Hi Sean, >> I think you can remove this else and "ret = 0". Because Code will come to >> this point when irq_set_vcpu_affinity() is successful, ensuring that ret is >> 0. > > Ah, nice, because of this: > > if (ret < 0) { > pr_err("%s: failed to update PI IRTE\n", __func__); > goto out; > } > > However, looking at this again, I'm very tempted to simply leave the "ret = 0;" > that's already there so as to minimize the change. It'll get cleaned up later on > no matter what, so safety for LTS kernels is the driving factor as of this patch. > > Paolo, any preference? If you mean squashing this in: diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c index ef08356fdb1c..8e09f6ae98fd 100644 --- a/arch/x86/kvm/svm/avic.c +++ b/arch/x86/kvm/svm/avic.c @@ -967,6 +967,7 @@ int avic_pi_update_irte(struct kvm *kvm, unsigned int host_irq, } } + ret = 0; if (enable_remapped_mode) { /* Use legacy mode in IRTE */ struct amd_iommu_pi_data pi; @@ -994,8 +995,6 @@ int avic_pi_update_irte(struct kvm *kvm, unsigned int host_irq, if (vcpu) svm_ir_list_del(to_svm(vcpu), &pi); } - } else { - ret = 0; } out: srcu_read_unlock(&kvm->irq_srcu, idx); to undo the moving of "ret = 0", that's a good idea yes. Paolo