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From: Dave Jiang <dave.jiang@intel.com>
To: Anisa Su <anisa.su887@gmail.com>,
	linux-cxl@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: nvdimm@lists.linux.dev, Dan Williams <djbw@kernel.org>,
	Jonathan Cameron <jic23@kernel.org>,
	Davidlohr Bueso <dave@stgolabs.net>,
	Ira Weiny <iweiny@kernel.org>,
	Alison Schofield <alison.schofield@intel.com>,
	John Groves <John@Groves.net>, Gregory Price <gourry@gourry.net>,
	Ira Weiny <ira.weiny@intel.com>
Subject: Re: [PATCH v6 3/7] cxl/region: Add cxl-cli support for dynamic RAM A
Date: Mon, 8 Jun 2026 16:58:54 -0700	[thread overview]
Message-ID: <e6821b4f-a67a-4894-bc57-afff307e1ba1@intel.com> (raw)
In-Reply-To: <20260523095043.471098-4-anisa.su@samsung.com>



On 5/23/26 2:50 AM, Anisa Su wrote:
> From: Ira Weiny <ira.weiny@intel.com>
> 
> A singular Dynamic RAM partition is exposed via the kernel.
> 
> Use this partition in cxl-cli.
> 
> Signed-off-by: Ira Weiny <ira.weiny@intel.com>

Missing Anisa sign off

Reviewed-by: Dave Jiang <dave.jiang@intel.com>



> 
> ---
> Changes:
> [iweiny: New patch for decoder_ram_a]
> ---
>  cxl/json.c   | 20 ++++++++++++++++++++
>  cxl/memdev.c |  4 +++-
>  cxl/region.c | 27 ++++++++++++++++++++++++---
>  3 files changed, 47 insertions(+), 4 deletions(-)
> 
> diff --git a/cxl/json.c b/cxl/json.c
> index a925488..e94c809 100644
> --- a/cxl/json.c
> +++ b/cxl/json.c
> @@ -620,6 +620,20 @@ struct json_object *util_cxl_memdev_to_json(struct cxl_memdev *memdev,
>  		}
>  	}
>  
> +	size = cxl_memdev_get_dynamic_ram_a_size(memdev);
> +	if (size) {
> +		jobj = util_json_object_size(size, flags);
> +		if (jobj)
> +			json_object_object_add(jdev, "dynamic_ram_a_size", jobj);
> +
> +		qos_class = cxl_memdev_get_dynamic_ram_a_qos_class(memdev);
> +		if (qos_class != CXL_QOS_CLASS_NONE) {
> +			jobj = json_object_new_int(qos_class);
> +			if (jobj)
> +				json_object_object_add(jdev, "dynamic_ram_a_qos_class", jobj);
> +		}
> +	}
> +
>  	if (flags & UTIL_JSON_HEALTH) {
>  		jobj = util_cxl_memdev_health_to_json(memdev, flags);
>  		if (jobj)
> @@ -917,6 +931,12 @@ struct json_object *util_cxl_decoder_to_json(struct cxl_decoder *decoder,
>  				json_object_object_add(
>  					jdecoder, "volatile_capable", jobj);
>  		}
> +		if (cxl_decoder_is_dynamic_ram_a_capable(decoder)) {
> +			jobj = json_object_new_boolean(true);
> +			if (jobj)
> +				json_object_object_add(
> +					jdecoder, "dynamic_ram_a_capable", jobj);
> +		}
>  	}
>  
>  	if (cxl_port_is_root(port) &&
> diff --git a/cxl/memdev.c b/cxl/memdev.c
> index 6e44d15..bdcb008 100644
> --- a/cxl/memdev.c
> +++ b/cxl/memdev.c
> @@ -269,8 +269,10 @@ static int __reserve_dpa(struct cxl_memdev *memdev,
>  
>  	if (mode == CXL_DECODER_MODE_RAM)
>  		avail_dpa = cxl_memdev_get_ram_size(memdev);
> -	else
> +	else if (mode == CXL_DECODER_MODE_PMEM)
>  		avail_dpa = cxl_memdev_get_pmem_size(memdev);
> +	else
> +		avail_dpa = cxl_memdev_get_dynamic_ram_a_size(memdev);
>  
>  	cxl_decoder_foreach(port, decoder) {
>  		size = cxl_decoder_get_dpa_size(decoder);
> diff --git a/cxl/region.c b/cxl/region.c
> index 85d4d9b..3c935bf 100644
> --- a/cxl/region.c
> +++ b/cxl/region.c
> @@ -303,7 +303,8 @@ static int parse_create_options(struct cxl_ctx *ctx, int count,
>  
>  	if (param.type) {
>  		p->mode = cxl_decoder_mode_from_ident(param.type);
> -		if (p->mode == CXL_DECODER_MODE_RAM && param.uuid) {
> +		if ((p->mode == CXL_DECODER_MODE_RAM ||
> +		     p->mode == CXL_DECODER_MODE_DYNAMIC_RAM_A) && param.uuid) {
>  			log_err(&rl,
>  				"can't set UUID for ram / volatile regions");
>  			goto err;
> @@ -417,6 +418,9 @@ static void collect_minsize(struct cxl_ctx *ctx, struct parsed_params *p)
>  		case CXL_DECODER_MODE_PMEM:
>  			size = cxl_memdev_get_pmem_size(memdev);
>  			break;
> +		case CXL_DECODER_MODE_DYNAMIC_RAM_A:
> +			size = cxl_memdev_get_dynamic_ram_a_size(memdev);
> +			break;
>  		default:
>  			/* Shouldn't ever get here */ ;
>  		}
> @@ -448,8 +452,10 @@ static int create_region_validate_qos_class(struct parsed_params *p)
>  
>  		if (p->mode == CXL_DECODER_MODE_RAM)
>  			qos_class = cxl_memdev_get_ram_qos_class(memdev);
> -		else
> +		else if (p->mode == CXL_DECODER_MODE_PMEM)
>  			qos_class = cxl_memdev_get_pmem_qos_class(memdev);
> +		else
> +			qos_class = cxl_memdev_get_dynamic_ram_a_qos_class(memdev);
>  
>  		/* No qos_class entries. Possibly no kernel support */
>  		if (qos_class == CXL_QOS_CLASS_NONE)
> @@ -488,6 +494,12 @@ static int validate_decoder(struct cxl_decoder *decoder,
>  			return -EINVAL;
>  		}
>  		break;
> +	case CXL_DECODER_MODE_DYNAMIC_RAM_A:
> +		if (!cxl_decoder_is_dynamic_ram_a_capable(decoder)) {
> +			log_err(&rl, "%s is not dynamic_ram_a capable\n", devname);
> +			return -EINVAL;
> +		}
> +		break;
>  	default:
>  		log_err(&rl, "unknown type: %s\n", param.type);
>  		return -EINVAL;
> @@ -509,9 +521,11 @@ static void set_type_from_decoder(struct cxl_ctx *ctx, struct parsed_params *p)
>  		return;
>  
>  	/*
> -	 * default to pmem if both types are set, otherwise the single
> +	 * default to pmem if all types are set, otherwise the single
>  	 * capability dominates.
>  	 */
> +	if (cxl_decoder_is_dynamic_ram_a_capable(p->root_decoder))
> +		p->mode = CXL_DECODER_MODE_DYNAMIC_RAM_A;
>  	if (cxl_decoder_is_volatile_capable(p->root_decoder))
>  		p->mode = CXL_DECODER_MODE_RAM;
>  	if (cxl_decoder_is_pmem_capable(p->root_decoder))
> @@ -699,6 +713,13 @@ static int create_region(struct cxl_ctx *ctx, int *count,
>  				param.root_decoder);
>  			return -ENXIO;
>  		}
> +	} else if (p->mode == CXL_DECODER_MODE_DYNAMIC_RAM_A) {
> +		region = cxl_decoder_create_dynamic_ram_a_region(p->root_decoder);
> +		if (!region) {
> +			log_err(&rl, "failed to create region under %s\n",
> +				param.root_decoder);
> +			return -ENXIO;
> +		}
>  	} else {
>  		log_err(&rl, "region type '%s' is not supported\n",
>  			param.type);


  reply	other threads:[~2026-06-08 23:58 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-23  9:50 [PATCH v6 0/7] ndctl: Dynamic Capacity additions for cxl-cli Anisa Su
2026-05-23  9:50 ` [PATCH v6 1/7] " Anisa Su
2026-06-08 23:18   ` Dave Jiang
2026-05-23  9:50 ` [PATCH v6 2/7] libcxl: Add Dynamic RAM A partition mode support Anisa Su
2026-06-08 23:19   ` Dave Jiang
2026-06-10  3:51     ` Richard Cheng
2026-06-10 16:55       ` Dave Jiang
2026-06-25  9:08         ` Anisa Su
2026-06-25  9:07     ` Anisa Su
2026-05-23  9:50 ` [PATCH v6 3/7] cxl/region: Add cxl-cli support for dynamic RAM A Anisa Su
2026-06-08 23:58   ` Dave Jiang [this message]
2026-05-23  9:50 ` [PATCH v6 4/7] libcxl: Add extent functionality to DC regions Anisa Su
2026-06-09  0:05   ` Dave Jiang
2026-06-25  9:18     ` Anisa Su
2026-05-23  9:50 ` [PATCH v6 5/7] cxl/region: Add extent output to region query Anisa Su
2026-06-09  0:08   ` Dave Jiang
2026-06-10  3:55     ` Richard Cheng
2026-06-16 10:47       ` Anisa Su
2026-06-16 10:45     ` Anisa Su
2026-05-23  9:50 ` [PATCH v6 6/7] daxctl: Add --uuid option to create-device for sparse regions Anisa Su
2026-06-09  0:12   ` Dave Jiang
2026-06-25  9:30     ` Anisa Su
2026-05-23  9:50 ` [PATCH v6 7/7] cxl/test: Add Dynamic Capacity tests Anisa Su
2026-06-09  0:24   ` Dave Jiang
2026-06-25  9:34     ` Anisa Su
2026-06-05  5:43 ` [PATCH v6 0/7] ndctl: Dynamic Capacity additions for cxl-cli Alison Schofield
2026-06-08  8:11   ` Anisa Su
2026-06-17  7:10   ` Alison Schofield
2026-06-18  5:52     ` Anisa Su
2026-06-19  0:38       ` Alison Schofield
2026-06-24  4:51         ` Anisa Su

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