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Thu, 18 Jul 2024 03:34:50 -0400 (EDT) X-Mailer: MessagingEngine.com Webmail Interface User-Agent: Cyrus-JMAP/3.11.0-alpha0-568-g843fbadbe-fm-20240701.003-g843fbadb Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: In-Reply-To: <20240714-loongson64-cevt-r4k-v1-1-98afed7260aa@flygoat.com> References: <20240714-loongson64-cevt-r4k-v1-1-98afed7260aa@flygoat.com> Date: Thu, 18 Jul 2024 15:34:30 +0800 From: "Jiaxun Yang" To: "Thomas Bogendoerfer" , "Huacai Chen" Cc: "linux-mips@vger.kernel.org" , linux-kernel@vger.kernel.org Subject: Re: [PATCH] MIPS: Loongson64: Switch to SYNC_R4K Content-Type: text/plain;charset=utf-8 Content-Transfer-Encoding: quoted-printable =E5=9C=A82024=E5=B9=B47=E6=9C=8814=E6=97=A5=E4=B8=83=E6=9C=88 =E4=B8=8A=E5= =8D=8810:41=EF=BC=8CJiaxun Yang=E5=86=99=E9=81=93=EF=BC=9A > Nowadays SYNC_R4K is performing better than Loongson64's > custom sync mechanism. > > Switch to SYNC_R4K to improve performance and reduce code > duplication. > > Signed-off-by: Jiaxun Yang > --- > Last minute for 6.11 :-) Hi Thomas, Could you please apply this to 6.11 PR, or 6.11 fixes? This is technically a left over of previous clock source series, and it = does help on preventing random RCU stall for multi-node Loongson-3 systems. Thanks - Jiaxun > --- > arch/mips/Kconfig | 1 + > arch/mips/include/asm/smp.h | 1 - > arch/mips/loongson64/smp.c | 35 ++--------------------------------- > 3 files changed, 3 insertions(+), 34 deletions(-) > > diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig > index 1236ea122061..e163059dd4d3 100644 > --- a/arch/mips/Kconfig > +++ b/arch/mips/Kconfig > @@ -478,6 +478,7 @@ config MACH_LOONGSON64 > select BOARD_SCACHE > select CSRC_R4K > select CEVT_R4K > + select SYNC_R4K > select FORCE_PCI > select ISA > select I8259 > diff --git a/arch/mips/include/asm/smp.h b/arch/mips/include/asm/smp.h > index bc2c240f414b..2427d76f953f 100644 > --- a/arch/mips/include/asm/smp.h > +++ b/arch/mips/include/asm/smp.h > @@ -50,7 +50,6 @@ extern int __cpu_logical_map[NR_CPUS]; > #define SMP_CALL_FUNCTION 0x2 > /* Octeon - Tell another core to flush its icache */ > #define SMP_ICACHE_FLUSH 0x4 > -#define SMP_ASK_C0COUNT 0x8 >=20 > /* Mask of CPUs which are currently definitely operating coherently */ > extern cpumask_t cpu_coherent_mask; > diff --git a/arch/mips/loongson64/smp.c b/arch/mips/loongson64/smp.c > index 66d049cdcf14..147acd972a07 100644 > --- a/arch/mips/loongson64/smp.c > +++ b/arch/mips/loongson64/smp.c > @@ -33,7 +33,6 @@ static void __iomem *ipi_clear0_regs[16]; > static void __iomem *ipi_status0_regs[16]; > static void __iomem *ipi_en0_regs[16]; > static void __iomem *ipi_mailbox_buf[16]; > -static uint32_t core0_c0count[NR_CPUS]; >=20 > static u32 (*ipi_read_clear)(int cpu); > static void (*ipi_write_action)(int cpu, u32 action); > @@ -382,11 +381,10 @@ loongson3_send_ipi_mask(const struct cpumask=20 > *mask, unsigned int action) > ipi_write_action(cpu_logical_map(i), (u32)action); > } >=20 > - > static irqreturn_t loongson3_ipi_interrupt(int irq, void *dev_id) > { > - int i, cpu =3D smp_processor_id(); > - unsigned int action, c0count; > + int cpu =3D smp_processor_id(); > + unsigned int action; >=20 > action =3D ipi_read_clear(cpu); >=20 > @@ -399,26 +397,14 @@ static irqreturn_t loongson3_ipi_interrupt(int=20 > irq, void *dev_id) > irq_exit(); > } >=20 > - if (action & SMP_ASK_C0COUNT) { > - BUG_ON(cpu !=3D 0); > - c0count =3D read_c0_count(); > - c0count =3D c0count ? c0count : 1; > - for (i =3D 1; i < nr_cpu_ids; i++) > - core0_c0count[i] =3D c0count; > - nudge_writes(); /* Let others see the result ASAP */ > - } > - > return IRQ_HANDLED; > } >=20 > -#define MAX_LOOPS 800 > /* > * SMP init and finish on secondary CPUs > */ > static void loongson3_init_secondary(void) > { > - int i; > - uint32_t initcount; > unsigned int cpu =3D smp_processor_id(); > unsigned int imask =3D STATUSF_IP7 | STATUSF_IP6 | > STATUSF_IP3 | STATUSF_IP2; > @@ -432,23 +418,6 @@ static void loongson3_init_secondary(void) > cpu_logical_map(cpu) % loongson_sysconf.cores_per_package); > cpu_data[cpu].package =3D > cpu_logical_map(cpu) / loongson_sysconf.cores_per_package; > - > - i =3D 0; > - core0_c0count[cpu] =3D 0; > - loongson3_send_ipi_single(0, SMP_ASK_C0COUNT); > - while (!core0_c0count[cpu]) { > - i++; > - cpu_relax(); > - } > - > - if (i > MAX_LOOPS) > - i =3D MAX_LOOPS; > - if (cpu_data[cpu].package) > - initcount =3D core0_c0count[cpu] + i; > - else /* Local access is faster for loops */ > - initcount =3D core0_c0count[cpu] + i/2; > - > - write_c0_count(initcount); > } >=20 > static void loongson3_smp_finish(void) > > --- > base-commit: 0b58e108042b0ed28a71cd7edf5175999955b233 > change-id: 20240714-loongson64-cevt-r4k-eb74d4ad984c > > Best regards, > --=20 > Jiaxun Yang --=20 - Jiaxun