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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-759c84e2727sm561340b3a.33.2025.07.17.23.27.24 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 17 Jul 2025 23:27:26 -0700 (PDT) Message-ID: Date: Fri, 18 Jul 2025 14:27:21 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/4] arm64: dts: qcom: Add HAMOA-IOT-SOM platform To: Stephan Gerhold Cc: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20250716-hamoa_initial-v1-0-f6f5d0f9a163@oss.qualcomm.com> <20250716-hamoa_initial-v1-3-f6f5d0f9a163@oss.qualcomm.com> Content-Language: en-US From: Yijie Yang In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNzE4MDA0OSBTYWx0ZWRfX5U8UQnZUCy59 g7ibXDqNwE9GkX++iqkwzskfxsSYlvGyT5EHOyUJSY5+geyHlKyBXQED/4gg5tFZ02JQ5ZKYjU8 dE3V+L39BVJ1yhrsQFkn8bQRbYcYXcO32EynV4cVxWfrfVpAPYr/JW51Ss8upicEPCJlQa1NQ9B gEABj84NtffBewdCAQe8tiOrTHMzsxLN57qfsvFvXWlR3ECEvt3JKJ7dOmaNXeLNgJuCA56GlYi QVfKv5wNXCOpCI34f40UHgATaP9vPG7xCK+VYD3Uz9QdPi5e8HRTS6obJUVUxhnaIOUzf98NpgJ 1CyS+idta58QEgPMo8j3FCYsYUGYyvnsunleCMwkDSEo/ht9ewa3sC63uJGrQHskRfowyeISsL8 bitzI65vYH60bclddF+e0u7W7SiKQtWAfyezBvrktWIR4nM2zrFTxxy6BwchfzF0Ftw68kK+ X-Proofpoint-GUID: JgQzrEDb_nnOwpKKo0O6TtvMO78mzZhW X-Proofpoint-ORIG-GUID: JgQzrEDb_nnOwpKKo0O6TtvMO78mzZhW X-Authority-Analysis: v=2.4 cv=McZsu4/f c=1 sm=1 tr=0 ts=6879e950 cx=c_pps a=rEQLjTOiSrHUhVqRoksmgQ==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=Wb1JkmetP80A:10 a=EUspDBNiAAAA:8 a=FHlHFmSbb6gL1abVproA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=2VI0MkxyNR6bbpdq8BZq:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-07-18_01,2025-07-17_02,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 mlxlogscore=999 impostorscore=0 mlxscore=0 phishscore=0 adultscore=0 lowpriorityscore=0 bulkscore=0 clxscore=1015 suspectscore=0 spamscore=0 priorityscore=1501 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2507180049 On 2025-07-18 00:14, Stephan Gerhold wrote: > On Wed, Jul 16, 2025 at 05:08:41PM +0800, Yijie Yang wrote: >> The HAMOA-IOT-SOM is a compact computing module that integrates a System >> on Chip (SoC) — specifically the x1e80100 — along with essential >> components optimized for IoT applications. It is designed to be mounted on >> carrier boards, enabling the development of complete embedded systems. >> >> This change enables and overlays the following components: >> - Regulators on the SOM >> - Reserved memory regions >> - PCIe6a and its PHY >> - PCIe4 and its PHY >> - USB0 through USB6 and their PHYs >> - ADSP, CDSP >> - WLAN, Bluetooth (M.2 interface) > > There is no WLAN in here, it's part of PATCH 4/4 as far as I can tell. > Move it to changelog of PATCH 4/4? There is no WLAN node defined in either the DTS or DTSI files, as its power is managed by UEFI. Once PCIe4 was enabled, WLAN was enabled as well. So I think it’s better to leave it here, right? > >> >> Written with contributions from Yingying Tang (added PCIe4 and its PHY to >> enable WLAN). >> >> Signed-off-by: Yijie Yang >> --- >> arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi | 607 ++++++++++++++++++++++++++++ >> 1 file changed, 607 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi b/arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi >> new file mode 100644 >> index 0000000000000000000000000000000000000000..dad24a6a49ad370aee48a9fd8f4a46f64c2b6348 >> --- /dev/null >> +++ b/arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi >> @@ -0,0 +1,607 @@ >> [...] >> +&remoteproc_adsp { >> + firmware-name = "qcom/hamoa-iot/adsp.mbn", >> + "qcom/hamoa-iot/adsp_dtb.mbn"; >> + >> + status = "okay"; >> +}; >> + >> +&remoteproc_cdsp { >> + firmware-name = "qcom/hamoa-iot/cdsp.mbn", >> + "qcom/hamoa-iot/cdsp_dtb.mbn"; > > You say this SoM can be used to build "complete embedded systems", are > you sure they will all use the same firwmare signatures? > > If not, this should be in the device-specific DT (i.e. the carrier board > in your case). You’re right. I just double-checked, and each board has its own specific firmware. I’ll remove it from the carrier board and update the path accordingly. > >> [...] >> +&usb_1_ss0 { >> + status = "okay"; >> +}; >> + >> +&usb_1_ss0_dwc3 { >> + dr_mode = "otg"; >> + usb-role-switch; >> +}; >> + >> +&usb_1_ss0_hsphy { >> + vdd-supply = <&vreg_l3j_0p8>; >> + vdda12-supply = <&vreg_l2j_1p2>; >> + >> + status = "okay"; >> +}; >> + >> +&usb_1_ss0_qmpphy { >> + vdda-phy-supply = <&vreg_l2j_1p2>; >> + vdda-pll-supply = <&vreg_l1j_0p8>; >> + >> + status = "okay"; >> +}; >> + >> +&usb_1_ss1 { >> + status = "okay"; >> +}; >> + >> +&usb_1_ss1_dwc3 { >> + dr_mode = "otg"; >> + usb-role-switch; >> +}; >> + >> +&usb_1_ss1_hsphy { >> + vdd-supply = <&vreg_l3j_0p8>; >> + vdda12-supply = <&vreg_l2j_1p2>; >> + >> + status = "okay"; >> +}; >> + >> +&usb_1_ss1_qmpphy { >> + vdda-phy-supply = <&vreg_l2j_1p2>; >> + vdda-pll-supply = <&vreg_l2d_0p9>; >> + >> + status = "okay"; >> +}; >> + >> +&usb_1_ss2 { >> + status = "okay"; >> +}; >> + >> +&usb_1_ss2_dwc3 { >> + dr_mode = "otg"; >> + usb-role-switch; >> +}; >> + >> +&usb_1_ss2_hsphy { >> + vdd-supply = <&vreg_l3j_0p8>; >> + vdda12-supply = <&vreg_l2j_1p2>; >> + >> + status = "okay"; >> +}; >> + >> +&usb_1_ss2_qmpphy { >> + vdda-phy-supply = <&vreg_l2j_1p2>; >> + vdda-pll-supply = <&vreg_l2d_0p9>; >> + >> + status = "okay"; >> +}; >> + >> +&usb_2 { >> + status = "okay"; >> +}; >> + >> +&usb_2_dwc3 { >> + dr_mode = "host"; >> +}; >> + >> +&usb_2_hsphy { >> + vdd-supply = <&vreg_l2e_0p8>; >> + vdda12-supply = <&vreg_l3e_1p2>; >> + >> + status = "okay"; >> +}; >> + >> +&usb_mp { >> + status = "okay"; >> +}; >> + >> +&usb_mp_hsphy0 { >> + vdd-supply = <&vreg_l2e_0p8>; >> + vdda12-supply = <&vreg_l3e_1p2>; >> + >> + status = "okay"; >> +}; >> + >> +&usb_mp_hsphy1 { >> + vdd-supply = <&vreg_l2e_0p8>; >> + vdda12-supply = <&vreg_l3e_1p2>; >> + >> + status = "okay"; >> +}; >> + >> +&usb_mp_qmpphy0 { >> + vdda-phy-supply = <&vreg_l3e_1p2>; >> + vdda-pll-supply = <&vreg_l3c_0p8>; >> + >> + status = "okay"; >> +}; >> + >> +&usb_mp_qmpphy1 { >> + vdda-phy-supply = <&vreg_l3e_1p2>; >> + vdda-pll-supply = <&vreg_l3c_0p8>; >> + >> + status = "okay"; >> +}; >> > > Assuming the USB ports are located on the carrier board and not the > SoM(?): > > Are carrier boards required to make use of all these USB > ports/interfaces? In my experience it's not unusual that embedded > carrier boards use only the functionality that they need. Maybe this > should just set the common properties and enabling individual ports for > PCIe and USB should be up to the carrier boards. > > Thanks, > Stephan -- Best Regards, Yijie