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[86.188.11.239]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4399c763e78sm10123237f8f.26.2026.02.27.14.01.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Feb 2026 14:01:22 -0800 (PST) Message-ID: Subject: Re: [PATCH v8 02/18] dt-bindings: media: qcom,x1e80100-camss: Convert from inline PHY definitions to PHY handles From: Christopher Obbard To: Bryan O'Donoghue , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Robert Foss , Todor Tomov , Mauro Carvalho Chehab , Konrad Dybcio , Vladimir Zapolskiy , Bryan O'Donoghue Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, Krzysztof Kozlowski Date: Fri, 27 Feb 2026 22:01:22 +0000 In-Reply-To: <20260225-b4-linux-next-25-03-13-dtsi-x1e80100-camss-v8-2-95517393bcb2@linaro.org> References: <20260225-b4-linux-next-25-03-13-dtsi-x1e80100-camss-v8-0-95517393bcb2@linaro.org> <20260225-b4-linux-next-25-03-13-dtsi-x1e80100-camss-v8-2-95517393bcb2@linaro.org> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.56.2-8 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Hi Bryan, On Wed, 2026-02-25 at 15:11 +0000, Bryan O'Donoghue wrote: > We currently do not have an upstream user of the x1e CAMSS schema which > allows us to make this the first platform to treat the CSI PHYs as separa= te > devices in much the same way as we treat the CCI block as separate device= s. >=20 > Convert the embedded CSIPHY node data to simple phys =3D <> removing all = of > the PHY specific stuff previously embedded. >=20 > I gave some serious thought to making the Test Pattern Generators TPGs in= to > PHY nodes also but, unlike the CSIPHYs the TPGs have no dedicated externa= l > pins nor regulators. >=20 > The CSIPHYs OTOH have dedicated in-fact generally unmuxed pins on Qualcom= m > SoCs and each CSIPHY has its own set of input power rails usually 0p8 and > 1p2. >=20 > Instead of defining the CSIPHYs as children of the CAMSS block, we take t= he > same approach as the CCI/I2C bus dedicated to CAMSS and define the CSIPHY= s > as their own nodes. >=20 > Remove the embedded CSIPHY specific data and give CAMSS regular, > bog-standard phys =3D <>; >=20 > Signed-off-by: Bryan O'Donoghue Reviewed-by: Christopher Obbard > --- > .../bindings/media/qcom,x1e80100-camss.yaml | 84 ++++++----------= ------ > 1 file changed, 20 insertions(+), 64 deletions(-) >=20 > diff --git a/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.= yaml b/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml > index 9aaed897f7e0e..ff14a8248321e 100644 > --- a/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml > +++ b/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml > @@ -17,7 +17,7 @@ properties: > const: qcom,x1e80100-camss > =20 > reg: > - maxItems: 17 > + maxItems: 13 > =20 > reg-names: > items: > @@ -27,10 +27,6 @@ properties: > - const: csid2 > - const: csid_lite0 > - const: csid_lite1 > - - const: csiphy0 > - - const: csiphy1 > - - const: csiphy2 > - - const: csiphy4 > - const: csitpg0 > - const: csitpg1 > - const: csitpg2 > @@ -40,7 +36,7 @@ properties: > - const: vfe_lite1 > =20 > clocks: > - maxItems: 29 > + maxItems: 21 > =20 > clock-names: > items: > @@ -55,14 +51,6 @@ properties: > - const: cphy_rx_clk_src > - const: csid > - const: csid_csiphy_rx > - - const: csiphy0 > - - const: csiphy0_timer > - - const: csiphy1 > - - const: csiphy1_timer > - - const: csiphy2 > - - const: csiphy2_timer > - - const: csiphy4 > - - const: csiphy4_timer > - const: gcc_axi_hf > - const: gcc_axi_sf > - const: vfe0 > @@ -75,7 +63,7 @@ properties: > - const: vfe_lite_csid > =20 > interrupts: > - maxItems: 13 > + maxItems: 9 > =20 > interrupt-names: > items: > @@ -84,15 +72,21 @@ properties: > - const: csid2 > - const: csid_lite0 > - const: csid_lite1 > - - const: csiphy0 > - - const: csiphy1 > - - const: csiphy2 > - - const: csiphy4 > - const: vfe0 > - const: vfe1 > - const: vfe_lite0 > - const: vfe_lite1 > =20 > + phys: > + maxItems: 4 > + > + phy-names: > + items: > + - const: csiphy0 > + - const: csiphy1 > + - const: csiphy2 > + - const: csiphy4 > + > interconnects: > maxItems: 4 > =20 > @@ -118,14 +112,6 @@ properties: > - const: ife1 > - const: top > =20 > - vdd-csiphy-0p8-supply: > - description: > - 0.8V supply to a PHY. > - > - vdd-csiphy-1p2-supply: > - description: > - 1.2V supply to a PHY. > - > ports: > $ref: /schemas/graph.yaml#/properties/ports > =20 > @@ -166,13 +152,13 @@ required: > - clock-names > - interrupts > - interrupt-names > + - phys > + - phy-names > - interconnects > - interconnect-names > - iommus > - power-domains > - power-domain-names > - - vdd-csiphy-0p8-supply > - - vdd-csiphy-1p2-supply > - ports > =20 > additionalProperties: false > @@ -199,10 +185,6 @@ examples: > <0 0x0acbb000 0 0x2000>, > <0 0x0acc6000 0 0x1000>, > <0 0x0acca000 0 0x1000>, > - <0 0x0ace4000 0 0x1000>, > - <0 0x0ace6000 0 0x1000>, > - <0 0x0ace8000 0 0x1000>, > - <0 0x0acec000 0 0x4000>, > <0 0x0acf6000 0 0x1000>, > <0 0x0acf7000 0 0x1000>, > <0 0x0acf8000 0 0x1000>, > @@ -217,10 +199,6 @@ examples: > "csid2", > "csid_lite0", > "csid_lite1", > - "csiphy0", > - "csiphy1", > - "csiphy2", > - "csiphy4", > "csitpg0", > "csitpg1", > "csitpg2", > @@ -240,14 +218,6 @@ examples: > <&camcc CAM_CC_CPHY_RX_CLK_SRC>, > <&camcc CAM_CC_CSID_CLK>, > <&camcc CAM_CC_CSID_CSIPHY_RX_CLK>, > - <&camcc CAM_CC_CSIPHY0_CLK>, > - <&camcc CAM_CC_CSI0PHYTIMER_CLK>, > - <&camcc CAM_CC_CSIPHY1_CLK>, > - <&camcc CAM_CC_CSI1PHYTIMER_CLK>, > - <&camcc CAM_CC_CSIPHY2_CLK>, > - <&camcc CAM_CC_CSI2PHYTIMER_CLK>, > - <&camcc CAM_CC_CSIPHY4_CLK>, > - <&camcc CAM_CC_CSI4PHYTIMER_CLK>, > <&gcc GCC_CAMERA_HF_AXI_CLK>, > <&gcc GCC_CAMERA_SF_AXI_CLK>, > <&camcc CAM_CC_IFE_0_CLK>, > @@ -270,14 +240,6 @@ examples: > "cphy_rx_clk_src", > "csid", > "csid_csiphy_rx", > - "csiphy0", > - "csiphy0_timer", > - "csiphy1", > - "csiphy1_timer", > - "csiphy2", > - "csiphy2_timer", > - "csiphy4", > - "csiphy4_timer", > "gcc_axi_hf", > "gcc_axi_sf", > "vfe0", > @@ -294,10 +256,6 @@ examples: > , > , > , > - , > - , > - , > - , > , > , > , > @@ -308,15 +266,16 @@ examples: > "csid2", > "csid_lite0", > "csid_lite1", > - "csiphy0", > - "csiphy1", > - "csiphy2", > - "csiphy4", > "vfe0", > "vfe1", > "vfe_lite0", > "vfe_lite1"; > =20 > + phys =3D <&csiphy0>, <&csiphy1>, > + <&csiphy2>, <&csiphy4>; > + phy-names =3D "csiphy0", "csiphy1", > + "csiphy2", "csiphy4"; > + > interconnects =3D <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_A= CTIVE_ONLY > &config_noc SLAVE_CAMERA_CFG QCOM_ICC_TAG_A= CTIVE_ONLY>, > <&mmss_noc MASTER_CAMNOC_HF QCOM_ICC_TAG_ALW= AYS > @@ -348,9 +307,6 @@ examples: > "ife1", > "top"; > =20 > - vdd-csiphy-0p8-supply =3D <&csiphy_0p8_supply>; > - vdd-csiphy-1p2-supply =3D <&csiphy_1p2_supply>; > - > ports { > #address-cells =3D <1>; > #size-cells =3D <0>;