Re: [PATCH v7 04/18] media: iris: Filter UBWC raw formats based on hardware capabilities

[Bryan O'Donoghue <bod@kernel.org>]

On 21/07/2026 17:23, Vikash Garodia wrote:
> 
> On 7/21/2026 8:34 PM, Dmitry Baryshkov wrote:
>> On Tue, 21 Jul 2026 at 17:08, Vikash Garodia
>> <vikash.garodia@oss.qualcomm.com> wrote:
>>>
>>>
>>> On 7/9/2026 7:11 PM, Dmitry Baryshkov wrote:
>>>> From: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com>
>>>>
>>>> The raw formats supported by Iris were previously advertised
>>>> unconditionally, assuming UBWC support on all platforms. However, some
>>>> platforms do not support UBWC which results in incorrect format
>>>> capability exposure.
>>>>
>>>> Use the UBWC configuration provided by the platform to dynamically
>>>> filter raw formats at runtime. If UBWC is not supported, UBWC-based
>>>> formats are omitted from the advertised capability list, while linear
>>>> formats remain available.
>>>>
>>>> Signed-off-by: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com>
>>>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
>>>> ---
>>>>     drivers/media/platform/qcom/iris/iris_vdec.c | 26 ++++++++++++++++++++++----
>>>>     drivers/media/platform/qcom/iris/iris_venc.c | 25 +++++++++++++++++++++----
>>>>     2 files changed, 43 insertions(+), 8 deletions(-)
>>>>
>>>> diff --git a/drivers/media/platform/qcom/iris/iris_vdec.c b/drivers/media/platform/qcom/iris/iris_vdec.c
>>>> index 4c8bc7aac135..9fee5f28097d 100644
>>>> --- a/drivers/media/platform/qcom/iris/iris_vdec.c
>>>> +++ b/drivers/media/platform/qcom/iris/iris_vdec.c
>>>> @@ -3,6 +3,7 @@
>>>>      * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
>>>>      */
>>>>
>>>> +#include <linux/soc/qcom/ubwc.h>
>>>>     #include <media/v4l2-event.h>
>>>>     #include <media/v4l2-mem2mem.h>
>>>>
>>>> @@ -69,8 +70,14 @@ static const u32 iris_vdec_formats_cap[] = {
>>>>         V4L2_PIX_FMT_QC10C,
>>>>     };
>>>>
>>>> +static const u32 iris_vdec_formats_noubwc_cap[] = {
>>>> +     V4L2_PIX_FMT_NV12,
>>>> +     V4L2_PIX_FMT_P010,
>>>> +};
>>>> +
>>>>     static bool check_format(struct iris_inst *inst, u32 pixfmt, u32 type)
>>>>     {
>>>> +     const struct qcom_ubwc_cfg_data *ubwc = inst->core->ubwc_cfg;
>>>>         unsigned int size, i;
>>>>         const u32 *fmt;
>>>>
>>>> @@ -80,8 +87,13 @@ static bool check_format(struct iris_inst *inst, u32 pixfmt, u32 type)
>>>>                 size = inst->core->iris_platform_data->inst_iris_fmts_size;
>>>>                 break;
>>>>         case V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE:
>>>> -             fmt = iris_vdec_formats_cap;
>>>> -             size = ARRAY_SIZE(iris_vdec_formats_cap);
>>>> +             if (ubwc->ubwc_enc_version) {
>>>
>>> Do you see a possibility that ubwc is enabled for a SOC while VPU
>>> hardware does not support UBWC. IP document for qcom,qcm2290 lists some
>>> UBWC configuration, while VPU does not support UBWC. Not sure at this
>>> point if other blocks indeed support UBWC for qcom,qcm2290.
>>
>> No, QCM2290 doesn't really support UBWC between the IP cores (as such
>> it has ubwc_enc_version = 0).
>> Currently the database defines a least common denominator for all IP
>> cores. If we ever get to a point where we want to define UBWC params
>> per the core, we will need to restructure the database.
>>
> 
> Ack.
> 
> 

Ack-by ?

---
bod