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Thu, 05 Dec 2024 00:22:14 -0800 (PST) X-Google-Smtp-Source: AGHT+IHcRbCkAcP5idjPLoolO7JpL2Ap2RjFZcB3DOTS1QrZrQiXx+rK9bxRV3fLK3OocETika1fcw== X-Received: by 2002:a17:902:ecca:b0:215:63a0:b58c with SMTP id d9443c01a7336-215bd24bb6fmr127417835ad.46.1733386934119; Thu, 05 Dec 2024 00:22:14 -0800 (PST) Received: from [10.92.169.167] ([202.46.23.19]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-215f8ef9ea6sm7453955ad.141.2024.12.05.00.22.09 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 05 Dec 2024 00:22:13 -0800 (PST) Message-ID: Date: Thu, 5 Dec 2024 13:52:08 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/2] arm64: dts: qcom: x1e80100-crd: Add USB multiport fingerprint reader To: Johan Hovold Cc: Stephan Gerhold , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Catalin Marinas , Will Deacon , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Abel Vesa , Krishna Kurapati , Thinh Nguyen , linux-usb@vger.kernel.org References: <20241118-x1e80100-crd-fp-v1-0-ec6b553a2e53@linaro.org> <20241118-x1e80100-crd-fp-v1-1-ec6b553a2e53@linaro.org> <98b2b88b-9690-44a7-9b22-2f23e6606e82@oss.qualcomm.com> Content-Language: en-US From: Krishna Kurapati In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Proofpoint-GUID: 67jPwshcqRxnA-LKEKBakBZKk4IbjMBs X-Proofpoint-ORIG-GUID: 67jPwshcqRxnA-LKEKBakBZKk4IbjMBs X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 bulkscore=0 mlxscore=0 mlxlogscore=638 lowpriorityscore=0 clxscore=1011 malwarescore=0 priorityscore=1501 spamscore=0 adultscore=0 suspectscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2412050061 On 12/5/2024 1:46 PM, Johan Hovold wrote: > On Thu, Dec 05, 2024 at 01:32:29PM +0530, Krishna Kurapati wrote: >> On 12/3/2024 6:45 PM, Krishna Kurapati wrote: >>> On 12/3/2024 3:50 PM, Johan Hovold wrote: >>>> On Mon, Nov 18, 2024 at 11:34:29AM +0100, Stephan Gerhold wrote: > >>>>> +&usb_mp_dwc3 { >>>>> +    /* Limit to USB 2.0 and single port */ >>>>> +    maximum-speed = "high-speed"; >>>>> +    phys = <&usb_mp_hsphy1>; >>>>> +    phy-names = "usb2-1"; >>>>> +}; >>>> >>>> The dwc3 driver determines (and acts on) the number of ports based on >>>> the port interrupts in DT and controller capabilities. >>>> >>>> I'm not sure we can (should) just drop the other HS PHY and the SS PHYs >>>> that would still be there in the SoC (possibly initialised by the boot >>>> firmware). >>> >>> The DWC3 core driver identifies number of ports based on xHCI registers. >>> The QC Wrapper reads this number via interrupts. But these two values >>> are independent of each other. The core driver uses these values to >>> identify and manipulate phys. Even if only one HS is given in multiport >>> it would be sufficient if the name is "usb2-1". If the others are >>> missing, those phys would be read by driver as NULL and any ops to phys >>> would be NOP. > > No, the core driver still acts on these ports (to some extent) even if > there is no PHY specified (e.g. updates DWC3_GUSB2PHYCFG on suspend). > Yes, since the port count is obtained from xHCI registers, the GUSB2PHYCFG/ GUSB3PIPECTL regs are modified regardless we use the PHYs or not but this is still fine. It can be considered a NOP AFAIK. > And IIRC I even had to specify more than just the fingerprint reader PHY > on the X13s to get it to enumerate. I never had time to fully determine > why this was the case though. > This might need to be checked. Did you attempt adding each phy individually ? Just incase the first PHY is not the one corresponding to the fingerprint reader. Regards, Krishna, >> However do we need to reduce the number of interrupts used in DTS ? >> We don't need to give all interrupts as there is only one port present. >> We don't want to enable all interrupts when ports are not exposed. > > No, the interrupts are still there, wired up in the SoC, so we should > not change that. > > With runtime PM eventually enabled and working as it should, the OS > should be able to power down any unused ports. And we could also > consider marking some ports as not physically accessible and not > connected as a further hint to the OS that they can be disabled even > sooner. > > Johan