From: Xi Ruoyao <xry111@xry111.site>
To: Borislav Petkov <bp@alien8.de>
Cc: x86@kernel.org, linux-kernel@vger.kernel.org,
Thomas Gleixner <tglx@linutronix.de>
Subject: Re: A question about prefetchw detection in "x86/asm: Cleanup prefetch primitives"
Date: Wed, 21 Jun 2023 21:47:36 +0800 [thread overview]
Message-ID: <e7113e249fa0fc1f259408c9f97655ec199dba5e.camel@xry111.site> (raw)
In-Reply-To: <20230621134645.GIZJL/Rf1IdeLMQGl2@fat_crate.local>
On Wed, 2023-06-21 at 15:46 +0200, Borislav Petkov wrote:
> On Wed, Jun 21, 2023 at 09:19:34PM +0800, Xi Ruoyao wrote:
> > On Wed, 2023-06-21 at 15:09 +0200, Borislav Petkov wrote:
> > > On Wed, Jun 21, 2023 at 09:06:51PM +0800, Xi Ruoyao wrote:
> > > > I think it's not an issue in the kernel itself, but announcing
> > > > 3dnowprefetch in /proc/cpuinfo for an old Intel CPU w/o real
> > > > prefetchw
> > > > implementation seems problematic (to me).
> > >
> > > And this is a problem because?
> >
> > If a code generator parses /proc/cpuinfo for CPU capabilities, it
> > may
> > generates a no-op prefetchw instead of prefetcht0 as a fallback.
>
> Err, go back.
>
> That code snippet you pasted, did you see where that comes from?
>
> A function called init_amd().
>
> Now, is Intel hardware and SDM PREFETCHW text at all relevant here?
Oh s**t, I'm completely stupid :(.
--
Xi Ruoyao <xry111@xry111.site>
School of Aerospace Science and Technology, Xidian University
next prev parent reply other threads:[~2023-06-21 13:47 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-21 10:57 Xi Ruoyao
2023-06-21 11:13 ` Borislav Petkov
2023-06-21 11:18 ` Xi Ruoyao
2023-06-21 12:04 ` Xi Ruoyao
2023-06-21 12:57 ` Borislav Petkov
2023-06-21 13:06 ` Xi Ruoyao
2023-06-21 13:09 ` Borislav Petkov
2023-06-21 13:19 ` Xi Ruoyao
2023-06-21 13:46 ` Borislav Petkov
2023-06-21 13:47 ` Xi Ruoyao [this message]
2023-06-21 13:57 ` Borislav Petkov
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