From: Marc Zyngier <marc.zyngier@arm.com>
To: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: Jason Cooper <jason@lakedaemon.net>,
Thomas Gleixner <tglx@linutronix.de>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 2/2] irqchip: Add a driver for the Microsemi Ocelot controller
Date: Thu, 22 Mar 2018 15:35:35 +0000 [thread overview]
Message-ID: <e7492bde-4a5f-8ae3-a5f3-5fc1168e2d87@arm.com> (raw)
In-Reply-To: <20180322151524.13902-2-alexandre.belloni@bootlin.com>
On 22/03/18 15:15, Alexandre Belloni wrote:
> The Microsemi Ocelot SoC has a pretty simple IRQ controller in its ICPU
> block. Add a driver for it.
>
> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
> ---
> Changes in v3:
> - moved parent irq parsing to the top of init
> - reworked error path
>
>
> drivers/irqchip/Kconfig | 5 ++
> drivers/irqchip/Makefile | 1 +
> drivers/irqchip/irq-mscc-ocelot.c | 118 ++++++++++++++++++++++++++++++++++++++
> 3 files changed, 124 insertions(+)
> create mode 100644 drivers/irqchip/irq-mscc-ocelot.c
Queued both patches for 4.17. Thanks for the quick turnaround.
M.
--
Jazz is not dead. It just smells funny...
prev parent reply other threads:[~2018-03-22 15:35 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-22 15:15 [PATCH v3 1/2] dt-bindings: interrupt-controller: Add binding for the Microsemi Ocelot interrupt controller Alexandre Belloni
2018-03-22 15:15 ` [PATCH v3 2/2] irqchip: Add a driver for the Microsemi Ocelot controller Alexandre Belloni
2018-03-22 15:35 ` Marc Zyngier [this message]
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