From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3E1E935CB6B; Fri, 16 Oct 2026 10:40:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1792147209; cv=none; b=iQTs6xRCvPKdn8eSEQf88zVGPNHOOre5NDqIcPo1e1unFlMbeMYUk7SIa9EaS+6t5Pa1dfpRpjCYpaPPQfvble9jP86wn0dckXa6OKjaE/Kco23BhpAXrEb1K3ejzEo7BIog9KhY9QFgXNL1VB1K99HootlPTZcr6FFSIZg16bI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1792147209; c=relaxed/simple; bh=CrQ+7PL5630ATgxoE7VYa6LeS6ariIsX+2lERifN+3g=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=XSWB4S3vwaVQbMXZmYcxXUsT85AjelWb838VjBZ276oRaTz2Ihrcxcwc3QP+448VFD12WoC+styUQHJQ/Hv+dSr0iBja+tZgjWXsYZ+XFai0sNrquEareCXLPg3/egbPSL72Bv2jSiQG3Ytor/FanTAZwo5sS2uDLXeZKOxHY1k= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=r7K+RhxZ; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="r7K+RhxZ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1792147206; x=1823683206; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=CrQ+7PL5630ATgxoE7VYa6LeS6ariIsX+2lERifN+3g=; b=r7K+RhxZOu9bjhztDS6fkd26XAB4gdts8b+cJY9i4xhmwUOwqNhw8z7c j4vktgU8lJTaJzrJboUXdoRVoGv7FerKo6RUDQNH2J80EXCEZqdnwQdPQ OqE1tErnTy5j7WhpWfQG2ARVlKnXtMnZ6XjzxTtcaeBl2/71ofciZazhk xDDFUss+7vYo/wjjnzwoPVJ/2WXCJocjuWpexPrYsz6rUPYFU7JpOIFrA s435QRucdmMD8HTAWTWF3t2DPZEbE17HYFzwA1hkeGntCpnQ2jMQMQ/S9 ZBHgzftTr94mMjHFf/qzeKLgwtyFu3qZNRF4ETHW/veGIRvKj4rZbGOc2 w==; X-CSE-ConnectionGUID: VsjY/r9jSgy/3Su5lYS4Wg== X-CSE-MsgGUID: /CW7h8dqR2iIiXuZDSPVBA== X-IronPort-AV: E=Sophos;i="6.27,161,1787036400"; d="scan'208";a="65140414" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa3.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Oct 2026 03:40:05 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.87.152) by chn-vm-ex2.mchp-main.com (10.10.87.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.2562.49; Fri, 16 Oct 2026 03:40:04 -0700 Received: from che-ll-i67131.microchip.com (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Fri, 16 Oct 2026 03:39:55 -0700 From: Manikandan Muralidharan To: , , , , , , , , , , , , , , , , , , , , , , , , , CC: Subject: [PATCH v9 7/8] ARM: dts: microchip: sama5d27_wlsom1: read MAC address from QSPI SFDP Date: Fri, 16 Oct 2026 16:08:35 +0530 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain Describe the QSPI flash SFDP as an NVMEM provider with the microchip,sst26vf-sfdp-eui layout, which exposes the factory-programmed EUI-48 as a "mac-address" cell, and point macb0 at it through nvmem-cells. This yields a stable MAC address on boards where U-Boot does not program one, instead of falling back to a random address. The sama5d27_wlsom1 SoM is fitted with the factory-programmed SST26VF064BEUI, and the QSPI flash node is only enabled on boards carrying that part, so the EUI-48 marker and its "mac-address" cell are always present. Boards without an EUI-programmed part simply do not reference the cell, so macb0 never defers waiting for it. Reviewed-by: Linus Walleij Signed-off-by: Manikandan Muralidharan --- arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1.dtsi | 11 +++++++++++ .../boot/dts/microchip/at91-sama5d27_wlsom1_ek.dts | 2 ++ 2 files changed, 13 insertions(+) diff --git a/arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1.dtsi b/arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1.dtsi index 6ce42a42a1bf..a4f55b2aa232 100644 --- a/arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1.dtsi +++ b/arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1.dtsi @@ -238,6 +238,17 @@ qspi1_flash: flash@0 { m25p,fast-read; status = "disabled"; + sfdp { + compatible = "jedec,sfdp"; + + nvmem-layout { + compatible = "microchip,sst26vf-sfdp-eui"; + + mac_address_eui48: mac-address { + }; + }; + }; + partitions { compatible = "fixed-partitions"; #address-cells = <1>; diff --git a/arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1_ek.dts b/arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1_ek.dts index 35a933eec573..5e87bf04bc47 100644 --- a/arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1_ek.dts +++ b/arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1_ek.dts @@ -97,6 +97,8 @@ uart6: serial@200 { &macb0 { status = "okay"; + nvmem-cells = <&mac_address_eui48>; + nvmem-cell-names = "mac-address"; }; &pioA { -- 2.43.0