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DRAM Address is neither >>> logged nor exported through tracepoint. >>> >>> Modern AMD SOCs provide UEFI PRM module that implements various address >>> translation PRM handlers. These PRM handlers can be leveraged to convert >>> UMC normalized address into DRAM address at runtime on occurrence of a >>> DRAM ECC error. This translated DRAM address can then be logged and >>> exported through tracepoints. >> >> And? >> >> I read all three commit messages to figure out *why* those DRAM addresses want >> to be logged. But it seems they don't want to be logged. Because there's not >> a single reason why they should be, AFAICT. Without a proper justification, >> this looks like a bunch of unnecessary code to me... >> > > Good point. I overlooked this myself. > > The "DRAM address" helps memory vendors analyze failures. System > builders want to collect this data and pass it along to the memory > vendors. The DRAM address is not contained in architectural data like > MCA info, and getting the address from MCA requires using additional > system-specific hardware info. It's much more reliable to get the DRAM > address from the system with the error rather than try to post-process > it later. > Adding to what Yazen mentioned, the algorithm employed for translating physical or normalized address into DRAM Address is somewhat complex. As such, user space tools might not incorporate the support required for translation. Having DRAM Address as part of kernel messages and tracepoints ensures that any memory error related information is not skipped. Does this alleviate your concerns? If yes, will add this information to commit messages and resend. > Thanks, > Yazen -- Thanks, Avadhut Naik