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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-acaa1cb4204sm415022866b.116.2025.04.11.02.48.57 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 11 Apr 2025 02:48:58 -0700 (PDT) Message-ID: Date: Fri, 11 Apr 2025 11:48:55 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 0/4] Retrieve information about DDR from SMEM To: Konrad Dybcio , Dmitry Baryshkov , Konrad Dybcio , Bjorn Andersson , Kees Cook , "Gustavo A. R. Silva" , Rob Clark , Sean Paul , Abhinav Kumar , David Airlie , Simona Vetter , Dmitry Baryshkov Cc: Marijn Suijten , linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-hardening@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org References: <20250409-topic-smem_dramc-v1-0-94d505cd5593@oss.qualcomm.com> <685e784c-3f36-4cd1-9c34-7f98c64d50f2@oss.qualcomm.com> <0bec3e62-0753-4c3d-abe1-1a43356afc80@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <0bec3e62-0753-4c3d-abe1-1a43356afc80@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: 9nScI5tJ8hPH3OzDXgbBGZTUlXafL8kc X-Proofpoint-ORIG-GUID: 9nScI5tJ8hPH3OzDXgbBGZTUlXafL8kc X-Authority-Analysis: v=2.4 cv=MpRS63ae c=1 sm=1 tr=0 ts=67f8e58c cx=c_pps a=HLyN3IcIa5EE8TELMZ618Q==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=XR8D0OoHHMoA:10 a=ur0lq8UJKF3ET7YIcuwA:9 a=QEXdDO2ut3YA:10 a=bTQJ7kPSJx9SKPbeHEYW:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1095,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-04-11_03,2025-04-10_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 mlxlogscore=807 clxscore=1015 priorityscore=1501 impostorscore=0 spamscore=0 bulkscore=0 suspectscore=0 malwarescore=0 adultscore=0 phishscore=0 mlxscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2502280000 definitions=main-2504110060 On 4/9/25 5:49 PM, Konrad Dybcio wrote: > On 4/9/25 5:44 PM, Dmitry Baryshkov wrote: >> On 09/04/2025 17:47, Konrad Dybcio wrote: >>> SMEM allows the OS to retrieve information about the DDR memory. >>> Among that information, is a semi-magic value called 'HBB', or Highest >>> Bank address Bit, which multimedia drivers (for hardware like Adreno >>> and MDSS) must retrieve in order to program the IP blocks correctly. >>> >>> This series introduces an API to retrieve that value, uses it in the >>> aforementioned programming sequences and exposes available DDR >>> frequencies in debugfs (to e.g. pass to aoss_qmp debugfs). More >>> information can be exposed in the future, as needed. >> >> I know that for some platforms HBB differs between GPU and DPU (as it's being programmed currently). Is there a way to check, which values are we going to program: >> >> - SM6115, SM6350, SM6375 (13 vs 14) SM6350 has INFO_V3 SM6375 has INFO_V3_WITH_14_FREQS >> - SC8180X (15 vs 16) So I overlooked the fact that DDR info v3 (e.g. on 8180) doesn't provide the HBB value.. Need to add some more sanity checks there. Maybe I can think up some fallback logic based on the DDR type reported. >> - QCM2290 (14 vs 15) I don't have one on hand, could you please give it a go on your RB1? I would assume both it and SM6115 also provide v3 though.. Konrad