From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from casper.infradead.org (casper.infradead.org [90.155.50.34]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7A4BB1DB449; Fri, 2 Aug 2024 09:55:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=90.155.50.34 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722592552; cv=none; b=pI07baPm2mzkM3rOnVELWBTH24oUaDqFuH/fOY6AugqNf/AD06zP7UsW+VkfG9jnlzsRaDi+zQJroey6jorei4ync1H7Brzr0Axr49rU3dAdSWZoV8S8ENNNQlMukRJ5UmZ5G0nd56b7z9y8FQyk5FOi0WlwNet1Hcnv+UZangM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722592552; c=relaxed/simple; bh=gfsrsy9aeFqAqU9yWbURrKdcmZt8i2YdtBvOr4UTBCc=; h=Message-ID:Subject:From:To:Date:In-Reply-To:References: Content-Type:MIME-Version; b=HSMvBBGLXAzSb4TQb45xa56Po/S/7GrhaYjJjd3wJxnOpVYqcujbKxe/26e6PQlxzpKdwTn6FwzRHDn28axldrZTTCh/GaaSL9m2fkwOVj7TU+3qkN3AM5EJmcKaDf0rt3Mb9ugMDuuDm9YIDVUUhLqe6JsxYuPfuirPSAr8/UY= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=infradead.org; spf=none smtp.mailfrom=casper.srs.infradead.org; dkim=pass (2048-bit key) header.d=infradead.org header.i=@infradead.org header.b=JV28x5pG; arc=none smtp.client-ip=90.155.50.34 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=infradead.org Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=casper.srs.infradead.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=infradead.org header.i=@infradead.org header.b="JV28x5pG" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:To:From:Subject:Message-ID:Sender:Reply-To:Cc: Content-Transfer-Encoding:Content-ID:Content-Description; bh=rtTDTw9Gni8KubcFPNZLhAg4nyhV2TlscOI77GxZyTg=; b=JV28x5pGsjRxLlL/zVBlfnvKtx fTIMVj8qf33X5hc+bSXRB/4RHHpH3Bfjn2TTWjqjg3l2DkxsyyQXsChraUSjKDq0lrgq/Fr0Bfm1h ehRCygpSwJMkVYkMJDg4eq9wH9EkJTQ9+ApEL/plSZ8b5Fx8Jzc5xx+vpGUJ2hj/eaDuvVrS/oEtC YRDzGEE0aa8A59offfNmQTpOf3Lw51bISVfEN2L2cBfc27O7mqO9jZY1r2a2YLhmSHLT/EjVEdPyK C3HBABAHo3raY2l6Cn8YvGscSa0yFTirPcE3bib5rp8SzjRjCb07b8iFW2AKB205ONl8K7Hr9ZN0m Igod/B5Q==; Received: from [2001:8b0:10b:5:9c27:6796:c1af:9131] (helo=u3832b3a9db3152.ant.amazon.com) by casper.infradead.org with esmtpsa (Exim 4.97.1 #2 (Red Hat Linux)) id 1sZp0X-00000000sx2-49Ev; Fri, 02 Aug 2024 09:55:34 +0000 Message-ID: Subject: Re: [PATCH] clockevents/drivers/i8253: Do not zero timer counter in shutdown From: David Woodhouse To: Thomas Gleixner , lirongqing@baidu.com, seanjc@google.com, kys@microsoft.com, haiyangz@microsoft.com, wei.liu@kernel.org, decui@microsoft.com, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, linux-hyperv@vger.kernel.org, linux-kernel@vger.kernel.org Date: Fri, 02 Aug 2024 10:55:33 +0100 In-Reply-To: <1508F48A-DCCF-4AF6-8CA3-109B289E98B2@infradead.org> References: <1675732476-14401-1-git-send-email-lirongqing@baidu.com> <87ttg42uju.ffs@tglx> <87ikwk2hcs.ffs@tglx> <87a5hw2euf.ffs@tglx> <871q382b0v.ffs@tglx> <1508F48A-DCCF-4AF6-8CA3-109B289E98B2@infradead.org> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-5FxiMSjbSBwrghl1/Sjz" User-Agent: Evolution 3.44.4-0ubuntu2 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html --=-5FxiMSjbSBwrghl1/Sjz Content-Type: multipart/mixed; boundary="=-/xP/5EMQood0nPv+fEDF" --=-/xP/5EMQood0nPv+fEDF Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Thu, 2024-08-01 at 22:31 +0100, David Woodhouse wrote: > On 1 August 2024 22:22:56 BST, Thomas Gleixner wrote= : > > On Thu, Aug 01 2024 at 21:49, David Woodhouse wrote: > > > On Thu, 2024-08-01 at 22:00 +0200, Thomas Gleixner wrote: > > > > > I justify my cowardice on the basis that it doesn't *matter* if a > > > > > hardware implementation is still toggling the IRQ pin; in that ca= se > > > > > it's only a few irrelevant transistors which are busy, and it doe= sn't > > > > > translate to steal time. > > > >=20 > > > > On real hardware it translates to power... > > >=20 > > > Perhaps, although I'd guess it's a negligible amount. Still, happy to > > > be brave and make it unconditional. Want a new version of the patch? > >=20 > > Let'ss fix the shutdown sequence first (See Michaels latest mail) and > > then do the clockevents_i8253_init() change on top. >=20 > Makes sense. On second thoughts, let's add clockevent_i8253_disable() first and call it when the PIT isn't being used, then we can bikeshed the precise behaviour of that function to our hearts' content. I think it should look like this. Revised version of your test program attached. void clockevent_i8253_disable(void) { raw_spin_lock(&i8253_lock); /* * Writing the MODE register should stop the counter, according to * the datasheet. This appears to work on real hardware (well, on * modern Intel and AMD boxes; I didn't dig the Pegasos out of the * shed). * * However, some virtual implementations differ, and the MODE change * doesn't have any effect until either the counter is written (KVM * in-kernel PIT) or the next interrupt (QEMU). And in those cases, * it may not stop the *count*, only the interrupts. Although in * the virt case, that probably doesn't matter, as the value of the * counter will only be calculated on demand if the guest reads it; * it's the interrupts which cause steal time. * * Hyper-V apparently has a bug where even in mode 0, the IRQ keeps * firing repeatedly if the counter is running. But it *does* do the * right thing when the MODE register is written. * * So: write the MODE and then load the counter, which ensures that * the IRQ is stopped on those buggy virt implementations. And then * write the MODE again, which is the right way to stop it. */ outb_p(0x30, PIT_MODE); outb_p(0, PIT_CH0); outb_p(0, PIT_CH0); outb_p(0x30, PIT_MODE); raw_spin_unlock(&i8253_lock); } --=-/xP/5EMQood0nPv+fEDF Content-Disposition: attachment; filename="i8254.c" Content-Transfer-Encoding: base64 Content-Type: text/x-csrc; name="i8254.c"; charset="UTF-8" I2luY2x1ZGUgPHN0ZGlvLmg+CiNpbmNsdWRlIDx1bmlzdGQuaD4KI2luY2x1ZGUgPHN0ZGxpYi5o PgojaW5jbHVkZSA8c3RkaW50Lmg+CiNpbmNsdWRlIDxzeXMvaW8uaD4KCnR5cGVkZWYgdW5zaWdu ZWQgY2hhcgl1aW50OF90Owp0eXBlZGVmIHVuc2lnbmVkIHNob3J0CXVpbnQxNl90OwoKI2RlZmlu ZSBCVUlMRElPKGJ3bCwgYncsIHR5cGUpCQkJCQkJXApzdGF0aWMgX19hbHdheXNfaW5saW5lIHZv aWQgX19vdXQjI2J3bCh0eXBlIHZhbHVlLCB1aW50MTZfdCBwb3J0KQlcCnsJCQkJCQkJCQlcCglh c20gdm9sYXRpbGUoIm91dCIgI2J3bCAiICUiICNidyAiMCwgJXcxIgkJCVwKCQkgICAgIDogOiAi YSIodmFsdWUpLCAiTmQiKHBvcnQpKTsJCQlcCn0JCQkJCQkJCQlcCgkJCQkJCQkJCVwKc3RhdGlj IF9fYWx3YXlzX2lubGluZSB0eXBlIF9faW4jI2J3bCh1aW50MTZfdCBwb3J0KQkJCVwKewkJCQkJ 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