From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1E8F43A6F0B for ; Fri, 27 Mar 2026 10:07:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774606075; cv=none; b=lTR6OYF0nmj3UkA0qNCLP7x6FxdJPB5Ghi3VUCMUro8T0jyr1q5oy3KqzfllKuX++EJWq7bG9U0u2yj1NKXv3tQbluO3htD6zcYYVEWDCUTneRFknEzrhubJX6LTA/Xs/ogNoprBkyUZKvVOHjE5txFJnQeff+QXHQLy35NU1AQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774606075; c=relaxed/simple; bh=oJywBROlv+qVPJo1tFw4l5AOhXKRmUFUOcF1LcaLAFQ=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=gw9Roh9Mz31JxTiX2VScAi2i5YKsTgnLnQsH0qWJHYHj9z3JkyfciDiGGtCqAMTWzgEH8fsT//CAC+pX2ameTxtDf+QMCkDKxKJH3Z7pTr8sIRrDfWqKL9cXXliL8L2snF/hcUg8UcVxcFYs448Ept8GAvwJRA8gQwpeYh2BPf8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=e9EHlytI; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=YoRDDkCT; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="e9EHlytI"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="YoRDDkCT" Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 62R6w7Br3132239 for ; Fri, 27 Mar 2026 10:07:53 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= xPdH5qml1h9BZi0j2A2fsbs34QlWxVd/aklZ5kvyOTs=; b=e9EHlytIdywEPWTD 39TnP0cmNofvASKvqU/gBxM+mf6hxXLeXbj5KdhdZ6WBNeDsrXHlnGjbzqdwgIzX x4dJxAslVv/eeQBvs+LNVl3R8uWMP3bThaoLIoK2V4/d+o7VsxmUb00CDBMcVWIh Jz76tazr9xvVXke/qU3s59wp6eDAMgiSPjFFGACIeKsi1YR+IQsN/KH9240yD5UC 3MpkETytN29yoEeeTpjcWtYKblQpydUseX0pjTLYbVv2+6RZR+fLmwX8ebA0akGq kVVtWkZe36msYVJfqMhLi9h1pO+jiyF9e+jVnrYAMTrADYVLzG3X5vdRaS/SSo3R E8c50A== Received: from mail-pf1-f199.google.com (mail-pf1-f199.google.com [209.85.210.199]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4d59s4304y-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Fri, 27 Mar 2026 10:07:53 +0000 (GMT) Received: by mail-pf1-f199.google.com with SMTP id d2e1a72fcca58-82c7a84a43eso4089600b3a.0 for ; Fri, 27 Mar 2026 03:07:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1774606072; x=1775210872; darn=vger.kernel.org; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=xPdH5qml1h9BZi0j2A2fsbs34QlWxVd/aklZ5kvyOTs=; b=YoRDDkCTZQWtX55qWruqYyS1EpI536GKbIBlPbEhu1lRryCr7UG3kb3lU0mwQIiAsz dpuFPwFrGq9CXz+jGLstx2adylNfuZlbv9aWSN3ntZZV1B1GVlsle7XEpnkXiHIhylO2 mJQOPBn9Sv5XeqJQmI4Qcz+l7Ouu7JfTSTHTdjwNeCBS4o5PFNU7bJL+dZQl8VkFcP7A /VCj2XmdXx6i+NTCMhKBK912pJeXcP9EafOM7bQZEzwt0EmLT0dd3dKIg/3JIgk8MeZi 6c6A1VLEnBaBcflVHECZHJOEn5cpUib7AMjod0k4W/SnvXQSQmO00mvKH9c5e1F4doXr 42ZA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1774606072; x=1775210872; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :x-gm-gg:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=xPdH5qml1h9BZi0j2A2fsbs34QlWxVd/aklZ5kvyOTs=; b=kpNYI9GH4yEZHtIKHqdO/HaCVLHe1G76yQ3l95J2vNG4XwKUPjIJ9SpBPQeQRV67Ad 7VoS5aOwGKgKWRe2Q5RRPDO5zqjk2uEIzDtSRLsXTdaO2Y+1q0iS6+Y4gpi0l0XLTR4P jT1WgQ+lSzBHzEXX8kkz6aKtf1MT9m5pX1emDXvwS6MczuF+yMiIEhHwgEz+x8lExFwu fOHf3AIRYbIdQEtYfm9BydlubdcLTVHXZ/XS4Sb6vXgXHNrOmsl/a2bJRUj+IR0DFbcy 7mn3WPNH0pT4wZ2Ubaw7LfUDwbSa1gD5jWcNFp8aI2zraoZcnxUp1L2f4KwdsG7TVpGe Gaig== X-Forwarded-Encrypted: i=1; AJvYcCX4Bps/h71eZks06kmGIOS6kdJN7Yk5x6dkoQ98Sv5QinAVzT+Hquk0GwOOhJ3SudASA427w15qvI4D4rw=@vger.kernel.org X-Gm-Message-State: AOJu0YwvTvRMSWEc8+tGrpP54NdDXG50NOoRgyxQquyf25SSG8el0cnS 3GwKNJOiXxB1Wsd1lpZGOQpdYROBpy08VbOQWtFIohl2lb2N20cPOdKyAOCLvj+0uub7X4kvpa3 4y/dkcpO0mCgA/gsYP4o2Hz22wuyyl9wUxFCF78LIfPhU9m4mPjX6sTvKPhrriLSrvyw= X-Gm-Gg: ATEYQzw1N5hjIYoce6riwLuPCSHroZSMXp+HU7kK4BppE167+t4eXrLD3ZBbPmiE2W8 YDrXl3Z7m6gv//2MeoD4ZoP7EB28C8MTaG5+GMuUobBmQOK/glC5umpzrd5eLeuok9oZpxQ06r+ 0r7gN7JrIwbW8PMihGpwNH4xYIfXSWd5X24HCsYgHDqy0QcmXPBJKcC/yhe3+4Fj2O3kAoXNF7Q XhLx2Dt2YUoRjLkhfiSeRDGdFOx/RhmgGZJxORWIzvlrr4+rH9BXXSjozThsXIGDhjDh7wi0KrD v91pU0ZkEDwDQbq/Ik4OTIpa8QH1MliXcxbwgWtpU0Bxy8k6REISvf39UBkN1NR41nJrPQbl1Xm 72zCHr3ikGK35mfOolCynwuglgbFCLjpEMn00dT2Hp5jwaRzmySJucNA= X-Received: by 2002:a05:6a00:3405:b0:82a:68fb:cd6d with SMTP id d2e1a72fcca58-82c959d4ac7mr1873013b3a.3.1774606072000; Fri, 27 Mar 2026 03:07:52 -0700 (PDT) X-Received: by 2002:a05:6a00:3405:b0:82a:68fb:cd6d with SMTP id d2e1a72fcca58-82c959d4ac7mr1872992b3a.3.1774606071485; Fri, 27 Mar 2026 03:07:51 -0700 (PDT) Received: from [10.217.218.237] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-82c7d1e5ee6sm5012429b3a.7.2026.03.27.03.07.47 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 27 Mar 2026 03:07:50 -0700 (PDT) Message-ID: Date: Fri, 27 Mar 2026 15:37:45 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1] i2c: qcom-geni: Skip extra TX DMA TRE for single read message in GPI mode To: Mukesh Kumar Savaliya , Mukesh Kumar Savaliya , Viken Dadhaniya , Andi Shyti , Sumit Semwal , =?UTF-8?Q?Christian_K=C3=B6nig?= Cc: linux-i2c@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, dri-devel@lists.freedesktop.org, linaro-mm-sig@lists.linaro.org, Maramaina Naresh References: <20260326-skip_extra_dma_tre-v1-1-deef018895dc@oss.qualcomm.com> <341f2f06-eae0-44b1-b513-61a4a129bae2@quicinc.com> Content-Language: en-US From: Aniket RANDIVE In-Reply-To: <341f2f06-eae0-44b1-b513-61a4a129bae2@quicinc.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Proofpoint-ORIG-GUID: E7otlquNb-xJnZbzQ0wwQP8StLsPichV X-Proofpoint-GUID: E7otlquNb-xJnZbzQ0wwQP8StLsPichV X-Authority-Analysis: v=2.4 cv=CoGys34D c=1 sm=1 tr=0 ts=69c656f9 cx=c_pps a=WW5sKcV1LcKqjgzy2JUPuA==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22 a=EUspDBNiAAAA:8 a=3qtGEnkgDDs7DTPDeWgA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=OpyuDcXvxspvyRM73sMx:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzI3MDA3NCBTYWx0ZWRfX0vG9TjmHFbmA mRg36DCtEXu5ceSPspYMOrh3sqdLuErEjlwoeGKnLsGrOjdiC2B2Meib1HVK5rcDzrP1ZIt9MoE TVCmzhTL9leAGZLn5ESIipmE2S63zxR6yoSz+yilckjz9woS4haObk+BWl2bX+1WjoV/JqKaRmK ZLYvI3Yd39MvsPHMSx2+ad+D4glSBH6v/tX/eabT4KO1a5fbZO0+9iakjFQ3xktn5a3fM8W2m2C 0xC4npwvs0oODKiM/bUifB89cfhJw7qQEy+e6KRDnL7CuDhQfVE7JfOvWBOCRRrUevkHSdcqxDn fS00egnnaXnzpZqFQ7MVru90acpp6UOVccsDljHaztBCmyrC2qU+MNzocYSyon+tEzwJWnxAYsG iT2ZYbBdK8XZaRpUxV2w8iMqqQd5e0pcIkBZFi1tbhprU3O257oA9G0Hr5O334AK2spSyLMkg8k 2C8KT9XMH0lSfz/yHMw== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-26_04,2026-03-26_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 adultscore=0 suspectscore=0 malwarescore=0 clxscore=1015 lowpriorityscore=0 bulkscore=0 priorityscore=1501 impostorscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603270074 On 3/27/2026 11:51 AM, Mukesh Kumar Savaliya wrote: > > > On 3/26/2026 10:01 AM, Aniket Randive wrote: >> In GPI mode, the I2C GENI driver incorrectly generates an extra TX DMA >> TRE on the TX channel during single read message transfer. This results > What's the impact of this extra DMA TRE ? do you see failure/timeout, > anything ? This write operation is unnecessary. For a 1‑byte read operation, only the CONFIG, GO and RX DMA TRE are required. However, an additional TX DMA TRE is currently being added. In addition to being redundant, this also results in unnecessary DMA buffer mapping for the TX DMA TRE. >> in an unnecessary write operation on the I2C bus, which is not required. >> >> Update the logic to avoid generating the extra TX DMA TRE for single >> read message, ensuring correct behavior and preventing redundant >> transfers. >> > So for read, we do unwanted write too ? if so, please write it > accordingly.  Correct behavior needs to be justified against wrong. Yes. Currently, the driver performs an unnecessary write as part of a read transaction. For a single‑byte read operation, the correct behavior is to issue only the CONFIG, GO command, and an RX DMA TRE. This TX DMA TRE does not contribute to the read operation and results in an unintended write and redundant DMA buffer mapping. Hence, the current behavior is incorrect and should be fixed to align with the required hardware transaction sequence. >> Co-developed-by: Maramaina Naresh >> Signed-off-by: Maramaina Naresh >> Signed-off-by: Aniket Randive >> --- >>   drivers/i2c/busses/i2c-qcom-geni.c | 18 +++++++++++++----- >>   1 file changed, 13 insertions(+), 5 deletions(-) >> >> diff --git a/drivers/i2c/busses/i2c-qcom-geni.c b/drivers/i2c/busses/ >> i2c-qcom-geni.c >> index a4acb78fafb6..2706309bbebb 100644 >> --- a/drivers/i2c/busses/i2c-qcom-geni.c >> +++ b/drivers/i2c/busses/i2c-qcom-geni.c >> @@ -625,8 +625,8 @@ static int geni_i2c_gpi(struct geni_i2c_dev *gi2c, >> struct i2c_msg msgs[], >>   { >>       struct gpi_i2c_config *peripheral; >>       unsigned int flags; >> -    void *dma_buf; >> -    dma_addr_t addr; >> +    void *dma_buf = NULL; >> +    dma_addr_t addr = 0; >>       enum dma_data_direction map_dirn; >>       enum dma_transfer_direction dma_dirn; >>       struct dma_async_tx_descriptor *desc; >> @@ -639,6 +639,11 @@ static int geni_i2c_gpi(struct geni_i2c_dev >> *gi2c, struct i2c_msg msgs[], >>       gi2c_gpi_xfer = &gi2c->i2c_multi_desc_config; >>       msg_idx = gi2c_gpi_xfer->msg_idx_cnt; >> +    if (op == I2C_WRITE && msgs[msg_idx].flags & I2C_M_RD) { >> +        peripheral->multi_msg = true; > what's the actual meaning of multi_msg here ? IIUC, this multi_msg is > set to true for single transfer  ? any better name if so ? Yes, need to > change it out of this patch. In the GPI driver, a DMA TRE is created only when either the operation is a read or when multi_msg is set to false. This is controlled by the following check during I2C TRE construction, if (i2c->op == I2C_READ || i2c->multi_msg == false) { /* create the DMA TRE */ tre = &desc->tre[tre_idx]; Previously, when dmaengine_prep_slave_single() was invoked for a write operation, this condition evaluated to true and a TX DMA TRE was created on the TX channel. With the recent change, the flag is explicitly set, which correctly prevents creation of a TX DMA TRE. I agree the variable name can be improved for clarity and propose addressing that in a follow‑up patch to keep this change minimal and focused. >> +        goto skip_dma; >> +    } >> + >>       dma_buf = i2c_get_dma_safe_msg_buf(&msgs[msg_idx], 1); >>       if (!dma_buf) { >>           ret = -ENOMEM; >> @@ -668,6 +673,7 @@ static int geni_i2c_gpi(struct geni_i2c_dev *gi2c, >> struct i2c_msg msgs[], >>           flags = DMA_PREP_INTERRUPT | DMA_CTRL_ACK; >>       } >> +skip_dma: >>       /* set the length as message for rx txn */ >>       peripheral->rx_len = msgs[msg_idx].len; >>       peripheral->op = op; >> @@ -740,9 +746,11 @@ static int geni_i2c_gpi(struct geni_i2c_dev >> *gi2c, struct i2c_msg msgs[], >>       return 0; >>   err_config: >> -    dma_unmap_single(gi2c->se.dev->parent, addr, >> -             msgs[msg_idx].len, map_dirn); >> -    i2c_put_dma_safe_msg_buf(dma_buf, &msgs[msg_idx], false); >> +    if (op == I2C_WRITE && (msgs[msg_idx].flags & I2C_M_RD)) { >> +        dma_unmap_single(gi2c->se.dev->parent, addr, >> +                 msgs[msg_idx].len, map_dirn); >> +        i2c_put_dma_safe_msg_buf(dma_buf, &msgs[msg_idx], false); >> +    } >>   out: >>       gi2c->err = ret; >> >> --- >> base-commit: 785f0eb2f85decbe7c1ef9ae922931f0194ffc2e >> change-id: 20260325-skip_extra_dma_tre-a3cf22f81d9b >> >> Best regards, >> -- >> Aniket Randive >> >> >