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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5f2fbc0673dsm2618728a12.19.2025.04.10.09.45.24 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 10 Apr 2025 09:45:25 -0700 (PDT) Message-ID: Date: Thu, 10 Apr 2025 18:45:23 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] arm64: dts: qcom: msm8953: Add uart_5 To: Luca Weiss , ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Felix Kaechele References: <20250406-msm8953-uart_5-v1-1-7e4841674137@lucaweiss.eu> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20250406-msm8953-uart_5-v1-1-7e4841674137@lucaweiss.eu> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: 68hl_0ricpGU2a8MoxUanzzGSyfBVVVq X-Proofpoint-GUID: 68hl_0ricpGU2a8MoxUanzzGSyfBVVVq X-Authority-Analysis: v=2.4 cv=NaLm13D4 c=1 sm=1 tr=0 ts=67f7f5a7 cx=c_pps a=EVbN6Ke/fEF3bsl7X48z0g==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=XR8D0OoHHMoA:10 a=TyM6OeZ_AAAA:8 a=dlmhaOwlAAAA:8 a=EUspDBNiAAAA:8 a=Zn5KjoL0Do0GK0u-booA:9 a=QEXdDO2ut3YA:10 a=a_PwQJl-kcHnX1M80qC6:22 a=RxdkCTCKa-xTImXFM8fo:22 a=y4cfut4LVr_MrANMpYTh:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1095,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-04-10_04,2025-04-10_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 impostorscore=0 priorityscore=1501 adultscore=0 malwarescore=0 suspectscore=0 lowpriorityscore=0 bulkscore=0 mlxlogscore=999 clxscore=1015 phishscore=0 spamscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2502280000 definitions=main-2504100122 On 4/6/25 3:52 PM, Luca Weiss wrote: > From: Felix Kaechele > > Add the node and pinctrl for uart_5 found on the MSM8953 SoC. > > Signed-off-by: Felix Kaechele > [luca: Prepare patch for upstream submission] > Signed-off-by: Luca Weiss > --- > arch/arm64/boot/dts/qcom/msm8953.dtsi | 32 ++++++++++++++++++++++++++++++++ > 1 file changed, 32 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/msm8953.dtsi b/arch/arm64/boot/dts/qcom/msm8953.dtsi > index af4c341e2533ef2cca593e0dc97003334d3fd6b7..3d6ab83cbce4696a8eb54b16fdb429e191f44637 100644 > --- a/arch/arm64/boot/dts/qcom/msm8953.dtsi > +++ b/arch/arm64/boot/dts/qcom/msm8953.dtsi > @@ -767,6 +767,20 @@ spi_6_sleep: spi-6-sleep-state { > bias-disable; > }; > > + uart_5_default: uart-5-default-state { > + pins = "gpio16", "gpio17", "gpio18", "gpio19"; > + function = "blsp_uart5"; > + drive-strength = <16>; This guy's strongly biased! But it looks like that's on purpose for these older SoCs.. > + bias-disable; > + }; > + > + uart_5_sleep: uart-5-sleep-state { > + pins = "gpio16", "gpio17", "gpio18", "gpio19"; > + function = "gpio"; > + drive-strength = <2>; > + bias-disable; > + }; > + > wcnss_pin_a: wcnss-active-state { > > wcss-wlan2-pins { > @@ -1592,6 +1606,24 @@ blsp2_dma: dma-controller@7ac4000 { > qcom,controlled-remotely; > }; > > + uart_5: serial@7aef000 { > + compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; > + reg = <0x07aef000 0x200>; > + interrupts = ; > + clocks = <&gcc GCC_BLSP2_UART1_APPS_CLK>, > + <&gcc GCC_BLSP2_AHB_CLK>; > + clock-names = "core", > + "iface"; > + dmas = <&blsp2_dma 0>, <&blsp2_dma 1>; > + dma-names = "tx", "rx"; Matches what the computer says It's more usual to send these together with a user, but I don't mind Reviewed-by: Konrad Dybcio Konrad