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charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: t9yPX6_6e8zSbLEjFd5Mwh_E6mtab_SJ X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODI0MDA5NyBTYWx0ZWRfX56KxBIgtao9C AyeSKUYlDFNi33pD90sc7dpHejbgIYyien/eycjK5VemNZbI8yWMdj7lNos8Gh5SXP4xWnXHrF/ vLD6Fxpn/wuWvp7DCAoto1Xqp1YEIkdf6Dk7KkqFPTJQ4QOuDXvG868MnfVn6DsuCP0s4CI8GGP 0JOUlXRyVxAdnw6YcBtztWGV6sb/p7QunjQrsqzuzddmyXKEk6s4tYg63AzUcEa11E2iTGqH0H+ 9P2+QNOwkyzwBADS/dJLYK1ybjC5RvXTJidEwVaRqJpCMAc9vr/b1Mb9Ori/ZMsI7Ybmgx3USN5 Df/n8T1f2qYjK94/KLnPAZgc78ejvqeo1l0aqgSFS780lXQ2IML05vNdeOph2ne40NPW65JtnkP Tf5GyaFLCu5uHAk5iYnYhelOeG914dE5iBXRzv3HjMS/fPk6wwM10Jv5A/bm4PI2Z9cqMWxLKj+ IZBRwBVaDv6saV7ClhQ== X-Authority-Analysis: v=2.4 cv=Fqo1OWrq c=1 sm=1 tr=0 ts=6a8c2db8 cx=c_pps a=mDZGXZTwRPZaeRUbqKGCBw==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=Sv0fKeRqtYgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yx91gb_oNiZeI1HMLzn7:22 a=EUspDBNiAAAA:8 a=2-yugF7U08GihXn5wV8A:9 a=QEXdDO2ut3YA:10 a=zc0IvFSfCIW2DFIPzwfm:22 X-Proofpoint-ORIG-GUID: t9yPX6_6e8zSbLEjFd5Mwh_E6mtab_SJ X-Proofpoint-Spam-Info: AW1haW4tMjYwODI0MDA5NyBTYWx0ZWRfX6PfDpmxR2yfm E5PcygBa5zWQ7sepZr3J7ZlWzdZdeArLdhHpvLJL3OA6ZMqZMn1+8oa21LNglHCPKCMXoL+SHuo qJdVaxAQWGR0+LiSb5JYL9hXcFzhqtI= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-24_03,2026-08-24_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 malwarescore=0 adultscore=0 lowpriorityscore=0 suspectscore=0 impostorscore=0 phishscore=0 spamscore=0 clxscore=1015 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608240097 On 8/5/2026 1:27 AM, Praveen Talari wrote: > The driver calls dev_pm_opp_set_rate() directly on uport->dev to apply > the computed source clock frequency, and dispatches baud rate handling > through a per-variant dev_data->set_rate() callback that either > recalculates the clock divider (Linux clock managed path) or selects > a performance level via geni_se_set_perf_level() (SA8255P firmware > managed path). > > Now that geni_se_domain_attach() populates se->clk_perf_tbl from the > perf domain's OPP table, geni_se_clk_freq_match() can resolve a source > clock frequency and divider on the SA8255P path the same way it > already does for the Linux clock managed path. This removes the need > for a separate perf-level based set_rate implementation, so > geni_serial_set_rate() can be called unconditionally and > dev_data->set_rate can be dropped. > > Switch to calling geni_serial_set_rate() directly from > qcom_geni_serial_set_termios(), and use geni_se_set_rate() in place of > dev_pm_opp_set_rate() so the frequency is applied to the correct > device (the perf domain device on the firmware managed path, or > uport->dev otherwise) without the driver needing to know which > resources_init variant is in use. Remove the now-unused set_rate field > from struct qcom_geni_device_data and its per-variant initializers. > This commit message seems quite long and repeats the rationale few times: 1. removes need for perf-level based set_rate 2. call geni_serial_set_rate unconditionally 3. use geni_se_set_rate instead of dev_pm_opp_set_rate Review, if below makes sense, tried to shorten it. geni_se_set_rate() now abstracts source clock programming for both clock-managed and SCMI/perf-domain managed GENI instances. Use geni_serial_set_rate() unconditionally from qcom_geni_serial_set_termios() and remove the per-variant set_rate() callback. This allows the UART driver to configure source clocks without needing to know whether resources are managed through Linux clocks or the SA8255P firmware-controlled performance domain. > Signed-off-by: Praveen Talari > ---