From: Paolo Bonzini <pbonzini@redhat.com>
To: Jim Mattson <jmattson@google.com>,
Tom Lendacky <thomas.lendacky@amd.com>
Cc: kvm list <kvm@vger.kernel.org>,
the arch/x86 maintainers <x86@kernel.org>,
LKML <linux-kernel@vger.kernel.org>,
Sean Christopherson <sean.j.christopherson@intel.com>,
Vitaly Kuznetsov <vkuznets@redhat.com>,
Wanpeng Li <wanpengli@tencent.com>,
Joerg Roedel <joro@8bytes.org>,
Brijesh Singh <brijesh.singh@amd.com>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
"H. Peter Anvin" <hpa@zytor.com>
Subject: Re: [PATCH v2 0/2] INVD intercept change to skip instruction
Date: Fri, 25 Sep 2020 19:31:11 +0200 [thread overview]
Message-ID: <e8aa489b-493c-87d2-3d26-a34d6eef810f@redhat.com> (raw)
In-Reply-To: <CALMp9eS2C398GUKm9FP6xdVLN=NYTO3y+EMKv0ptGJ_dzxkP+g@mail.gmail.com>
On 24/09/20 23:20, Jim Mattson wrote:
> On Thu, Sep 24, 2020 at 11:42 AM Tom Lendacky <thomas.lendacky@amd.com> wrote:
>>
>> From: Tom Lendacky <thomas.lendacky@amd.com>
>>
>> This series updates the INVD intercept support for both SVM and VMX to
>> skip the instruction rather than emulating it, since emulation of this
>> instruction is just a NOP.
>
> Isn't INVD a serializing instruction, whereas NOP isn't? IIRC, Intel
> doesn't architect VM-entry or VM-exit as serializing, though they
> probably are in practice. I'm not sure what AMD's stance on this is.
Of course that isn't changed by this patch, though.
Queuing both, but a clarification would be useful. The same applies
even to CPUID.
Paolo
prev parent reply other threads:[~2020-09-25 17:31 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-24 18:41 Tom Lendacky
2020-09-24 18:41 ` [PATCH v2 1/2] KVM: SVM: Add a dedicated INVD intercept routine Tom Lendacky
2020-09-24 18:41 ` [PATCH v2 2/2] KVM: VMX: Do not perform emulation for INVD intercept Tom Lendacky
2020-09-24 21:20 ` [PATCH v2 0/2] INVD intercept change to skip instruction Jim Mattson
2020-09-25 17:31 ` Paolo Bonzini [this message]
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