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Tue, 07 Jul 2026 05:37:35 -0700 (PDT) X-Received: by 2002:a05:6830:67da:b0:7e7:76f:3ec0 with SMTP id 46e09a7af769-7ebb233a1c7mr3266269a34.15.1783427854922; Tue, 07 Jul 2026 05:37:34 -0700 (PDT) Received: from [10.219.56.198] ([202.46.23.19]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-7eb542ebf72sm15010628a34.9.2026.07.07.05.37.29 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 07 Jul 2026 05:37:34 -0700 (PDT) Message-ID: Date: Tue, 7 Jul 2026 18:06:59 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 1/6] dt-bindings: iommu: arm,smmu: Document interconnects property To: Dmitry Baryshkov Cc: Will Deacon , Robin Murphy , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Rob Clark , linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Krzysztof Kozlowski References: <20260706-smmu_interconnect_addition-v3-0-afdca0125a65@oss.qualcomm.com> <20260706-smmu_interconnect_addition-v3-1-afdca0125a65@oss.qualcomm.com> Content-Language: en-US From: Bibek Kumar Patro In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=R7cz39RX c=1 sm=1 tr=0 ts=6a4cf310 cx=c_pps a=OI0sxtj7PyCX9F1bxD/puw==:117 a=j4ogTh8yFefVWWEFDRgCtg==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=3WHJM1ZQz_JShphwDgj5:22 a=EUspDBNiAAAA:8 a=1xpCzd4iWPYukUP1q-QA:9 a=QEXdDO2ut3YA:10 a=Z1Yy7GAxqfX1iEi80vsk:22 X-Proofpoint-GUID: -ozQY8hZqRUQz8s6DEK05V1tHuQoOFR- X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzA3MDEyMiBTYWx0ZWRfX15ErlSwEdAkQ Ku7SBin4gdETnJa4IfgSGs9VQuzLDNMcKe7KgvWrMBlTFvy7Njat5rGsxBEYjn+w6/7unIuyY9X aSQ43jutzT+2fhDKYpsAPG/b7F21CYs0p2IO6pR4Z9w4c5Nxa24Nq7E1fVq/S0wYvF5/BWrRjDz hioDmK4M/S2hANEvP2rddygxWV8sfWXlzB1ucQOpgIcIEHf6Nk97XLJAx3iI11ZAj6Ib+nKrKLB ai28qzG7/XeCsNo1nnNGtDPk9Hlv+KKBtqcd4boqV1PzXGWKhi4lKnE4+eWW87Chh8SnXATaCLX DElAIAOTBMLgppMY+rS52BxCJB1DvnfSvcIgs/lgAkv9d3S1N3tOnN81G0E9oDHiZg4O1//tw0k m57l/9EUc6FSV9QT5ghLQx/ar8qjbULK+pWdB4I6bCeqe72EMj8Zo2Xfk0Uf3evL+QzoZ95cJl3 lUMf86YdYu+5hPYGDPw== X-Proofpoint-ORIG-GUID: -ozQY8hZqRUQz8s6DEK05V1tHuQoOFR- X-Proofpoint-Spam-Info: AW1haW4tMjYwNzA3MDEyMiBTYWx0ZWRfX1nXwrj/aZxh4 c/q9TELqmTyW8+XUnTact4pJ74q8ah83982d9SJTLZBWZiy1Mc7V0DqZHmCu1k0F3txY3tnqGjg YoOs+/w2by0XQFvdZzpR9vwcwjPOSIg= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-07_03,2026-07-06_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 lowpriorityscore=0 impostorscore=0 clxscore=1015 malwarescore=0 bulkscore=0 spamscore=0 priorityscore=1501 phishscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607070122 On 7/6/2026 11:09 PM, Dmitry Baryshkov wrote: > On Mon, Jul 06, 2026 at 10:26:34PM +0530, Bibek Kumar Patro wrote: >> Some SoC implementations require a bandwidth vote on an interconnect >> path before the SMMU register space is accessible. Add the optional > > Why is it limited only to those SoCs? Is it also applicable to other > Qualcomm SoCs? > I was hoping to keep this series focused on the core infrastructure changes: the bindings, base ICC bandwidth-voting support, and DT interconnect properties for the platforms currently supported on Qualcomm Linux and have been validated so far. The additional targets have not been tested yet, so I'd prefer to add their support in a separate follow-up series once validation is complete, rather than growing this series further. WDYT? >> 'interconnects' property to the binding to allow platform DT nodes >> to describe this path. >> >> Reviewed-by: Krzysztof Kozlowski >> Signed-off-by: Bibek Kumar Patro >> --- >> .../devicetree/bindings/iommu/arm,smmu.yaml | 27 ++++++++++++++++++++++ >> 1 file changed, 27 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml >> index a701dec2fa0a..fab8944d7b63 100644 >> --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml >> +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml >> @@ -246,6 +246,13 @@ properties: >> minItems: 1 >> maxItems: 3 >> >> + interconnects: >> + maxItems: 1 >> + description: >> + Interconnect path to the SMMU register space. Required on SoCs >> + where the SMMU registers are only accessible after a bandwidth >> + vote has been placed on the interconnect fabric. >> + >> nvidia,memory-controller: >> description: | >> A phandle to the memory controller on NVIDIA Tegra186 and later SoCs. >> @@ -644,6 +651,26 @@ allOf: >> clock-names: false >> clocks: false >> >> + - if: >> + properties: >> + compatible: >> + items: >> + - enum: >> + - qcom,qcs615-smmu-500 >> + - qcom,qcs8300-smmu-500 >> + - qcom,sa8775p-smmu-500 >> + - qcom,sc7280-smmu-500 >> + - const: qcom,adreno-smmu >> + - const: qcom,smmu-500 >> + - const: arm,mmu-500 > > Can we be more idiomatic here? > Something like: > > if: > allOf: > - properties: > compatible: > contains: > enum: > - qcom,qcs615-smmu-500 > - qcom,qcs8300-smmu-500 > - qcom,sa8775p-smmu-500 > - qcom,sc7280-smmu-500 > - properties: > compatible: > contains: > const: qcom,adreno-smmu > > In the end, we don't need to list the full list of compats. We need to > specify that it's Adreno SMMU on one of the listed platforms. > Agreed. We need the interconnect property for any of the listed platform using the adreno-smmu only. Additionally in following e.g. compatible = "qcom,adreno-smmu", "qcom,sc7280-smmu-500", "qcom,smmu-500", "arm,mmu-500", "qcom,new-string"; The current schema could miss enforcing the interconnect property when new compatible strings are introduced, whereas the approach you suggested continues to handle such cases correctly. I'll update the binding accordingly in the next revision. Thanks & regards, Bibek >