From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932402AbdJZOqS convert rfc822-to-8bit (ORCPT ); Thu, 26 Oct 2017 10:46:18 -0400 Received: from hqemgate15.nvidia.com ([216.228.121.64]:12419 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932246AbdJZOqK (ORCPT ); Thu, 26 Oct 2017 10:46:10 -0400 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Thu, 26 Oct 2017 07:45:44 -0700 From: Bhadram Varka To: Jose Abreu , "netdev@vger.kernel.org" , "linux-kernel@vger.kernel.org" CC: Joao Pinto , "David S. Miller" , Giuseppe Cavallaro , Alexandre Torgue Subject: RE: [PATCH net] net: stmmac: First Queue must always be in DCB mode Thread-Topic: [PATCH net] net: stmmac: First Queue must always be in DCB mode Thread-Index: AQHTTjoUYI33+B58gEaSIyIqPX3CMqL18YOQgAAS+wCAACaA8A== Date: Thu, 26 Oct 2017 14:44:08 +0000 Message-ID: References: <73ccf81c-6865-9e02-83e1-5ba1e4d5e918@synopsys.com> In-Reply-To: <73ccf81c-6865-9e02-83e1-5ba1e4d5e918@synopsys.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-exchange-transport-fromentityheader: Hosted x-originating-ip: [10.25.72.145] MIME-Version: 1.0 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Jose, > -----Original Message----- > From: Jose Abreu [mailto:Jose.Abreu@synopsys.com] > Sent: Thursday, October 26, 2017 5:19 PM > To: Bhadram Varka ; netdev@vger.kernel.org; > linux-kernel@vger.kernel.org > Cc: Joao Pinto ; David S. Miller > ; Giuseppe Cavallaro ; > Alexandre Torgue > Subject: Re: [PATCH net] net: stmmac: First Queue must always be in DCB > mode > > Hi Bhadram, > > On 26-10-2017 11:51, Bhadram Varka wrote: > > Hi Jose, > > > >> -----Original Message----- > >> From: netdev-owner@vger.kernel.org [mailto:netdev- > >> owner@vger.kernel.org] On Behalf Of Jose Abreu > >> Sent: Thursday, October 26, 2017 2:37 PM > >> To: netdev@vger.kernel.org; linux-kernel@vger.kernel.org > >> Cc: Jose Abreu ; Joao Pinto > >> ; David S. Miller ; > >> Giuseppe Cavallaro ; Alexandre Torgue > >> > >> Subject: [PATCH net] net: stmmac: First Queue must always be in DCB > >> mode > >> > >> According to DWMAC databook the first queue operating mode must > >> always be in DCB. > >> > >> As MTL_QUEUE_DCB = 1, we need to always set the first queue operating > >> mode to DCB otherwise driver will think that queue is in AVB mode > >> (because MTL_QUEUE_AVB = 0). > >> > >> Signed-off-by: Jose Abreu > >> Cc: Joao Pinto > >> Cc: David S. Miller > >> Cc: Giuseppe Cavallaro > >> Cc: Alexandre Torgue > >> --- > >> drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c | 7 +++++++ > >> 1 file changed, 7 insertions(+) > >> > >> diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c > >> b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c > >> index 21f59fe..603225b 100644 > >> --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c > >> +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c > >> @@ -150,6 +150,13 @@ static void stmmac_mtl_setup(struct > >> platform_device *pdev, > >> plat->rx_queues_to_use = 1; > >> plat->tx_queues_to_use = 1; > >> > >> + /* First Queue must always be in DCB mode. As MTL_QUEUE_DCB = > >> 1 we need > >> + * to always set this, otherwise Queue will be classified as AVB > >> + * (because MTL_QUEUE_AVB = 0). > >> + */ > > Its better if we can check whether IP HW features (register - 0x120) > supports the DCB or not. If yes, then set the DCB mode. > > There is possibility that DCB feature not enable for few of the Synopsys > IP's. > > A queue can either be in Generic/DCB or AVB mode. The sequence to enable > a DCB or a Generic queue is the same so there is no need to check for DCB > capability in HW. Point is that we don't have DCB enabled for the IP. >>From your point it will work in Generic (legacy) mode if we set DCB filed. If this is the understanding then we are fine. Thanks, Bhadram.