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charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNjA0MDA2MyBTYWx0ZWRfX77FdHn2XCV8M vKMLW3uJTfMu6h/rW0OuqK5CabkLuyZs/YtDfW7zcWih7b2Okt77codf9WliWxFE7SqaxwiTDhd BO5tYEFOFNdmO4aJUm3Fvfn5VWkTupELTSP716Cl0n4bC995+NZIaSXxxZnVCrK/VrwM7Kkmuff o3gmp4GSdsVjlKSxbwponKSmnVT9jAUSyLbaX/5D2ari45OKQiNq2NazTdFHR6edfMUg9MUmbBE lN3KNSEvqSHlw3bo7OdwFIP/j/xKFkPd1F56SpPiRnLlcJB+5wdgRP/2xHTAYPurLNVyvgXBA4T 9T0yahIIKfQHbaRUXB5aKyn3zcfB91dNXVdYnOiUmXBjM4zxhg/yYL6cBi0Ug36UYaUzbzaqIwF zet8xmYMD7aJxDLIGywxGdyPz9IjEBXhgpqrizM1qy0eRQa3kVwvc3x8tCGW2jogPbKOQfJO X-Proofpoint-ORIG-GUID: W8ozeskPvM20bNOMHtkaqIPpffrjzj5Z X-Proofpoint-GUID: W8ozeskPvM20bNOMHtkaqIPpffrjzj5Z X-Authority-Analysis: v=2.4 cv=T/uMT+KQ c=1 sm=1 tr=0 ts=683ffcc2 cx=c_pps a=ouPCqIW2jiPt+lZRy3xVPw==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=GEpy-HfZoHoA:10 a=IkcTkHD0fZMA:10 a=6IFa9wvqVegA:10 a=JfrnYn6hAAAA:8 a=COk6AnOGAAAA:8 a=WXbjEpnkNGJP-WVJ2wQA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=1CNFftbPRP8L7MoqJWF3:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.736,FMLib:17.12.80.40 definitions=2025-06-04_02,2025-06-03_02,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 suspectscore=0 impostorscore=0 mlxscore=0 bulkscore=0 lowpriorityscore=0 clxscore=1015 spamscore=0 malwarescore=0 phishscore=0 adultscore=0 priorityscore=1501 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2506040063 On 6/3/2025 9:11 PM, Dmitry Baryshkov wrote: > On Thu, May 29, 2025 at 11:54:14AM +0800, Ziyue Zhang wrote: >> Each PCIe controller on sa8775p supports 'link_down'reset on hardware, >> document it. > I don't think it's possible to "support" reset in hardware. Either it > exists and is routed, or it is not. Hi Dmitry, I will change the commit msg to 'Each PCIe controller on sa8775p includes 'link_down'reset on hardware, document it.' "Supports" implies that the PCIe controller has an active role in enabling or managing the reset functionality—it suggests that the controller is designed to accommodate or facilitate this feature. "Includes" simply states that the reset functionality is present in the hardware—it exists, whether or not it's actively managed or configurable. So I think change it to includes will be better. BRs Ziyue >> Signed-off-by: Ziyue Zhang >> --- >> .../devicetree/bindings/pci/qcom,pcie-sa8775p.yaml | 13 +++++++++---- >> 1 file changed, 9 insertions(+), 4 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml >> index e3fa232da2ca..805258cbcf2f 100644 >> --- a/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml >> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml >> @@ -61,11 +61,14 @@ properties: >> - const: global >> >> resets: >> - maxItems: 1 >> + minItems: 1 >> + maxItems: 2 > Shouldn't we just update this to maxItems:2 / minItems:2 and drop > minItems:1 from the next clause? Hi Dmitry, link_down reset is optional. In many other platforms, like sm8550 and x1e80100, link_down reset is documented as a optional reset. PCIe will works fine without link_down reset. So I think setting it as optional is better. BRs Ziyue >> >> reset-names: >> + minItems: 1 >> items: >> - - const: pci >> + - const: pci # PCIe core reset >> + - const: link_down # PCIe link down reset >> >> required: >> - interconnects >> @@ -161,8 +164,10 @@ examples: >> >> power-domains = <&gcc PCIE_0_GDSC>; >> >> - resets = <&gcc GCC_PCIE_0_BCR>; >> - reset-names = "pci"; >> + resets = <&gcc GCC_PCIE_0_BCR>, >> + <&gcc GCC_PCIE_0_LINK_DOWN_BCR>; >> + reset-names = "pci", >> + "link_down"; >> >> perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>; >> wake-gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>; >> -- >> 2.34.1 >> >> >> -- >> linux-phy mailing list >> linux-phy@lists.infradead.org >> https://lists.infradead.org/mailman/listinfo/linux-phy