From: Jie Gan <jie.gan@oss.qualcomm.com>
To: Neeraj Soni <neeraj.soni@oss.qualcomm.com>,
ebiggers@kernel.org, ulf.hansson@linaro.org,
adrian.hunter@intel.com
Cc: quic_dmukhopa@quicinc.com, quic_rampraka@quicinc.com,
quic_nitirawa@quicinc.com, quic_sachgupt@quicinc.com,
quic_bhaskarv@quicinc.com, quic_gaurkash@quicinc.com,
quic_sartgarg@quicinc.com, linux-mmc@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org
Subject: Re: [PATCH RESEND v4] mmc: Avoid reprogram all keys to Inline Crypto Engine for MMC runtime suspend resume
Date: Fri, 29 May 2026 18:19:18 +0800 [thread overview]
Message-ID: <e9cdf8dc-40ea-49f2-a655-b99ed0707a8c@oss.qualcomm.com> (raw)
In-Reply-To: <20260529092612.1749752-1-neeraj.soni@oss.qualcomm.com>
On 5/29/2026 5:26 PM, Neeraj Soni wrote:
> From: Debraj Mukhopadhyay <quic_dmukhopa@quicinc.com>
>
> Crypto reprogram all keys is called for each MMC runtime
> suspend/resume in current upstream design. If this is implemented
> as a non-interruptible call to TEE for security, the cpu core is
> blocked for execution while this call executes although the crypto
> engine already has the keys. For example, glitches in audio/video
> streaming applications have been observed due to this. Add the flag
> MMC_CAP2_CRYPTO_NO_REPROG as part of host->caps2 to control reprogramming
> keys to crypto engine for socs which dont require this feature.
>
> Signed-off-by: Seshu Madhavi Puppala <quic_spuppala@quicinc.com>
> Co-developed-by: Ram Prakash Gupta <quic_rampraka@quicinc.com>
> Signed-off-by: Ram Prakash Gupta <quic_rampraka@quicinc.com>
> Co-developed-by: Sarthak Garg <quic_sartgarg@quicinc.com>
> Signed-off-by: Sarthak Garg <quic_sartgarg@quicinc.com>
> Signed-off-by: Debraj Mukhopadhyay <quic_dmukhopa@quicinc.com>
> Acked-by: Adrian Hunter <adrian.hunter@intel.com>
> Link: https://lore.kernel.org/r/20260116121004.1829223-1-neeraj.soni@oss.qualcomm.com
> Signed-off-by: Neeraj Soni <neeraj.soni@oss.qualcomm.com>
> ---
> drivers/mmc/core/crypto.c | 2 +-
> drivers/mmc/host/sdhci-msm.c | 6 ++++++
> include/linux/mmc/host.h | 5 +----
> 3 files changed, 8 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/mmc/core/crypto.c b/drivers/mmc/core/crypto.c
> index fec4fbf16a5b..a5a90bfc634e 100644
> --- a/drivers/mmc/core/crypto.c
> +++ b/drivers/mmc/core/crypto.c
> @@ -15,7 +15,7 @@
> void mmc_crypto_set_initial_state(struct mmc_host *host)
> {
> /* Reset might clear all keys, so reprogram all the keys. */
> - if (host->caps2 & MMC_CAP2_CRYPTO)
> + if ((host->caps2 & MMC_CAP2_CRYPTO) && !(host->caps2 & MMC_CAP2_CRYPTO_NO_REPROG))
> blk_crypto_reprogram_all_keys(&host->crypto_profile);
> }
>
> diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
> index 4e5edbf2fc9b..2ccb63dde9c1 100644
> --- a/drivers/mmc/host/sdhci-msm.c
> +++ b/drivers/mmc/host/sdhci-msm.c
> @@ -1949,6 +1949,7 @@ static int sdhci_msm_ice_init(struct sdhci_msm_host *msm_host,
> }
>
> mmc->caps2 |= MMC_CAP2_CRYPTO;
> + mmc->caps2 |= MMC_CAP2_CRYPTO_NO_REPROG;
> return 0;
> }
>
> @@ -2526,6 +2527,11 @@ static int sdhci_msm_gcc_reset(struct device *dev, struct sdhci_host *host)
> usleep_range(200, 210);
> reset_control_put(reset);
>
> +#ifdef CONFIG_MMC_CRYPTO
> + if (host->mmc->caps2 & MMC_CAP2_CRYPTO)
Always false at this point. The first set of the host->mmc->caps2 is
later in the sdhci_msm_cqe_add_host.
Thanks,
Jie
> + blk_crypto_reprogram_all_keys(&host->mmc->crypto_profile);
> +#endif
> +
> return ret;
> }
>
> diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h
> index e0e2c265e5d1..2fd76f966e24 100644
> --- a/include/linux/mmc/host.h
> +++ b/include/linux/mmc/host.h
> @@ -457,12 +457,9 @@ struct mmc_host {
> #define MMC_CAP2_CQE_DCMD (1 << 24) /* CQE can issue a direct command */
> #define MMC_CAP2_AVOID_3_3V (1 << 25) /* Host must negotiate down from 3.3V */
> #define MMC_CAP2_MERGE_CAPABLE (1 << 26) /* Host can merge a segment over the segment size */
> -#ifdef CONFIG_MMC_CRYPTO
> #define MMC_CAP2_CRYPTO (1 << 27) /* Host supports inline encryption */
> -#else
> -#define MMC_CAP2_CRYPTO 0
> -#endif
> #define MMC_CAP2_ALT_GPT_TEGRA (1 << 28) /* Host with eMMC that has GPT entry at a non-standard location */
> +#define MMC_CAP2_CRYPTO_NO_REPROG (1 << 29) /* Host handles inline crypto key reprogramming */
>
> bool uhs2_sd_tran; /* UHS-II flag for SD_TRAN state */
> bool uhs2_app_cmd; /* UHS-II flag for APP command */
next prev parent reply other threads:[~2026-05-29 10:19 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-29 9:26 Neeraj Soni
2026-05-29 10:19 ` Jie Gan [this message]
2026-05-29 10:35 ` Neeraj Soni
2026-07-23 23:01 ` Eric Biggers
2026-07-28 6:01 ` Neeraj Soni
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