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charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzMwMDA3MCBTYWx0ZWRfX0u+Oi0yp+EXn AlGWPz8LqDQo7N1Zf0f0fxVIcpFOGZJeoo3sMrIpqaaiDLEUiwQBaEMHvu16BpTaCNL7g/D8Tjm eT/vTyuU2iIE4ZZiFyeTP0z8LHF5gRPGh89KntRMYX7qxwPwEODRbE594MhmS5ikMbXSx0bY2FU /I/BUKFRwK4ez7/56F0ZSyvK/pNORT8umLNCOkdxfOhwj5hGQt5i96Yiz52Wi4xMtWTu7s4C8Gm pAY7A2uIPCH4+AJ34gvncoAuBx48FSQg+AIsUABynuL8Ci4hSsYaBxyEkdSnEZYdL70EbjzLnKq dOmEHjUXVbaY3RYwyhaQV1bdPfNNDYjBSDBeNN9Pbg0zh5X/U01lxRA1bWh5zhoQJ015PvPL6KI /a8+GZtcxyDR9aGqXQHVLqM2eXrw2yyisY6+VVPG0CpofNsEXnmh3pbPaOcAsqpYiwONBv/7Y2F OFdXf++hX/DamKxJtYQ== X-Authority-Analysis: v=2.4 cv=Fbw6BZ+6 c=1 sm=1 tr=0 ts=69ca3bd1 cx=c_pps a=JL+w9abYAAE89/QcEU+0QA==:117 a=Uz3yg00KUFJ2y2WijEJ4bw==:17 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22 a=EUspDBNiAAAA:8 a=e15bYA7AIXbTdG7xHUkA:9 a=QEXdDO2ut3YA:10 a=324X-CrmTo6CU4MGRt3R:22 X-Proofpoint-ORIG-GUID: SuSJAZ5Hi3cWOsR-KKfP2KnkVmuWxHnF X-Proofpoint-GUID: SuSJAZ5Hi3cWOsR-KKfP2KnkVmuWxHnF X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-29_05,2026-03-28_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 priorityscore=1501 adultscore=0 impostorscore=0 clxscore=1015 phishscore=0 suspectscore=0 bulkscore=0 lowpriorityscore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603300070 On 8/26/2025 1:28 AM, Dmitry Baryshkov wrote: > On Mon, Aug 25, 2025 at 10:15:51PM +0800, Yongxing Mou wrote: >> The DP_CONFIGURATION_CTRL register contains both link-level and >> stream-specific fields. Currently, msm_dp_ctrl_config_ctrl() configures >> all of them together, which makes it harder to support MST. >> >> This patch separates the configuration into two functions: > > git grep "This patch" Documentation/process > Got it. Will fix it next patch. >> - msm_dp_ctrl_config_ctrl_link(): handles link-related fields >> - msm_dp_ctrl_config_ctrl_streams(): handles stream-specific fields >> >> It also moves the link-related configuration out of >> msm_dp_ctrl_configure_source_params(). > > Why? And it looks like a separate patch... > Because the patches following msm_dp_ctrl_configure_source_params() will take a panel parameter, and lane_mapping and peripheral_flush seem to be more closely related to the link, they have been moved out. >> >> Signed-off-by: Yongxing Mou >> --- >> drivers/gpu/drm/msm/dp/dp_ctrl.c | 49 +++++++++++++++++++++++++--------------- >> 1 file changed, 31 insertions(+), 18 deletions(-) >> >> diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/dp/dp_ctrl.c >> index e1ff4c6bb4f0eed2e1ff931f12ba891cf81feffb..45d6c9a7f7ddaa049443253cbf4c6fc5feda3177 100644 >> --- a/drivers/gpu/drm/msm/dp/dp_ctrl.c >> +++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c >> @@ -380,26 +380,41 @@ void msm_dp_ctrl_push_idle(struct msm_dp_ctrl *msm_dp_ctrl) >> drm_dbg_dp(ctrl->drm_dev, "mainlink off\n"); >> } >> >> -static void msm_dp_ctrl_config_ctrl(struct msm_dp_ctrl_private *ctrl) >> +static void msm_dp_ctrl_config_ctrl_streams(struct msm_dp_ctrl_private *ctrl, >> + struct msm_dp_panel *msm_dp_panel) >> { >> u32 config = 0, tbd; >> + >> + config = msm_dp_read_link(ctrl, REG_DP_CONFIGURATION_CTRL); >> + >> + if (msm_dp_panel->msm_dp_mode.out_fmt_is_yuv_420) >> + config |= DP_CONFIGURATION_CTRL_RGB_YUV; /* YUV420 */ >> + >> + tbd = msm_dp_link_get_test_bits_depth(ctrl->link, >> + msm_dp_panel->msm_dp_mode.bpp); >> + >> + config |= tbd << DP_CONFIGURATION_CTRL_BPC_SHIFT; >> + >> + if (msm_dp_panel->psr_cap.version) >> + config |= DP_CONFIGURATION_CTRL_SEND_VSC; >> + >> + drm_dbg_dp(ctrl->drm_dev, "stream DP_CONFIGURATION_CTRL=0x%x\n", config); >> + >> + msm_dp_write_link(ctrl, REG_DP_CONFIGURATION_CTRL, config); >> +} >> + >> +static void msm_dp_ctrl_config_ctrl_link(struct msm_dp_ctrl_private *ctrl) >> +{ >> + u32 config = 0; >> const u8 *dpcd = ctrl->panel->dpcd; >> >> /* Default-> LSCLK DIV: 1/4 LCLK */ >> config |= (2 << DP_CONFIGURATION_CTRL_LSCLK_DIV_SHIFT); >> >> - if (ctrl->panel->msm_dp_mode.out_fmt_is_yuv_420) >> - config |= DP_CONFIGURATION_CTRL_RGB_YUV; /* YUV420 */ >> - >> /* Scrambler reset enable */ >> if (drm_dp_alternate_scrambler_reset_cap(dpcd)) >> config |= DP_CONFIGURATION_CTRL_ASSR; >> >> - tbd = msm_dp_link_get_test_bits_depth(ctrl->link, >> - ctrl->panel->msm_dp_mode.bpp); >> - >> - config |= tbd << DP_CONFIGURATION_CTRL_BPC_SHIFT; >> - >> /* Num of Lanes */ >> config |= ((ctrl->link->link_params.num_lanes - 1) >> << DP_CONFIGURATION_CTRL_NUM_OF_LANES_SHIFT); >> @@ -413,10 +428,7 @@ static void msm_dp_ctrl_config_ctrl(struct msm_dp_ctrl_private *ctrl) >> config |= DP_CONFIGURATION_CTRL_STATIC_DYNAMIC_CN; >> config |= DP_CONFIGURATION_CTRL_SYNC_ASYNC_CLK; >> >> - if (ctrl->panel->psr_cap.version) >> - config |= DP_CONFIGURATION_CTRL_SEND_VSC; >> - >> - drm_dbg_dp(ctrl->drm_dev, "DP_CONFIGURATION_CTRL=0x%x\n", config); >> + drm_dbg_dp(ctrl->drm_dev, "link DP_CONFIGURATION_CTRL=0x%x\n", config); >> >> msm_dp_write_link(ctrl, REG_DP_CONFIGURATION_CTRL, config); >> } >> @@ -439,10 +451,7 @@ static void msm_dp_ctrl_configure_source_params(struct msm_dp_ctrl_private *ctrl >> { >> u32 colorimetry_cfg, test_bits_depth, misc_val; >> >> - msm_dp_ctrl_lane_mapping(ctrl); >> - msm_dp_setup_peripheral_flush(ctrl); >> - >> - msm_dp_ctrl_config_ctrl(ctrl); >> + msm_dp_ctrl_config_ctrl_streams(ctrl, ctrl->panel); >> >> test_bits_depth = msm_dp_link_get_test_bits_depth(ctrl->link, ctrl->panel->msm_dp_mode.bpp); >> colorimetry_cfg = msm_dp_link_get_colorimetry_config(ctrl->link); >> @@ -1614,7 +1623,7 @@ static int msm_dp_ctrl_link_train(struct msm_dp_ctrl_private *ctrl, >> u8 assr; >> struct msm_dp_link_info link_info = {0}; >> >> - msm_dp_ctrl_config_ctrl(ctrl); >> + msm_dp_ctrl_config_ctrl_link(ctrl); >> >> link_info.num_lanes = ctrl->link->link_params.num_lanes; >> link_info.rate = ctrl->link->link_params.rate; >> @@ -2524,6 +2533,10 @@ int msm_dp_ctrl_on_stream(struct msm_dp_ctrl *msm_dp_ctrl) >> */ >> reinit_completion(&ctrl->video_comp); >> >> + msm_dp_ctrl_lane_mapping(ctrl); >> + msm_dp_setup_peripheral_flush(ctrl); >> + msm_dp_ctrl_config_ctrl_link(ctrl); >> + >> msm_dp_ctrl_configure_source_params(ctrl); >> >> msm_dp_ctrl_config_msa(ctrl, >> >> -- >> 2.34.1 >> >