Re: [PATCH v2] loongarch/mm: disable WUC for pgprot_writecombine as same as ioremap_wc

[Sui Jingfeng <sui.jingfeng@linux.dev>]

Hi,


On 2024/12/18 07:44, Icenowy Zheng wrote:
> 在 2024-12-03星期二的 00:23 +0800，Sui Jingfeng写道：
>> Hi,
>>
>> On 10/10/23 20:26, Xi Ruoyao wrote:
>>> On Tue, 2023-10-10 at 11:02 +0800, Sui Jingfeng wrote:
>>>
>>>> On LoongArch, cached mapping and uncached mappings are DMA-
>>>> coherent and guaranteed by
>>>> the hardware. While WC mappings is *NOT* DMA-coherent when 3D GPU
>>>> is involved. Therefore,
>>>> On downstream kernel, We disable write combine(WC) mappings at
>>>> the drm drivers side.
>>> Why it's only an issue when 3D GPU is involved?
>> No one saying that only 3D GPU is suffer from this kind of issue,
>> I just meant that the issue is there at least for GPU
>>
>>> What's the difference between 3D GPUs and other devices?  Is it
>>> possible that the other
>>> devices (say neural accelerators) start to perform DMA accesses in
>>> a
>>> similar way and then suddenly broken?
>> You, the patch contributor or the maintainer or whatever stuff
>> should carry on the test, right?
> Well doing some test on PCIe peripherals need some professional tool,
> then I assume who raises the idea should do it, because not everyone
> can do.


You are posting the patch, and then you are acclaiming that you are
not even able to do sufficient test? right?