From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A92BFC7EE2C for ; Thu, 24 Aug 2023 05:20:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239724AbjHXFTm (ORCPT ); Thu, 24 Aug 2023 01:19:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50338 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239643AbjHXFTc (ORCPT ); Thu, 24 Aug 2023 01:19:32 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0BADD198; Wed, 23 Aug 2023 22:19:30 -0700 (PDT) Received: from pps.filterd (m0279862.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 37O4xdKo015458; Thu, 24 Aug 2023 05:18:43 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=message-id : date : mime-version : subject : to : cc : references : from : in-reply-to : content-type : content-transfer-encoding; s=qcppdkim1; bh=zEoA+vnWTFcGKYryXxDX7QIHNupVhel1DxlfRKQiiaI=; b=kR7x3rDMW+Et/Z+/0mEVuX/85Jau3hquncMSSukSOXClm2nsfqbYfGLFIIB5F3UFfA5J DPl7I/F7m3YoS+I6aK72tVpoQgUPVfKWDSj3KkGSuoX3K+gyh2K3wucPjwtnGbqoXxEs zMyuosHXDaTl/0h9n9ASRFv70kuHsc+NtToRrhU8WWfXJV2d8NuET/XIJ7I67OrmX7YW 4KDpJyb6vjZfOcyCRmOZj1/0Mu1KUzuwYJCEn1V/iydiV3wK15nEi8Occnl987Q8M/RG Y7jFDVILorNYqZXfBri/wOsO+bukf8k5Pl4jUf4w4pb3kljGDRc9KpaCGqLu6arhAPKK bw== Received: from nalasppmta03.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3sn2t43rp4-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 24 Aug 2023 05:18:43 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 37O5Iehm007462 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 24 Aug 2023 05:18:41 GMT Received: from [10.201.2.96] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.36; Wed, 23 Aug 2023 22:18:33 -0700 Message-ID: Date: Thu, 24 Aug 2023 10:48:30 +0530 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.7.0 Subject: Re: [PATCH 3/6] dt-bindings: clock: Add ipq9574 NSSCC clock and reset definitions To: Devi Priya , , , , , , , , , , , , , , , , , , , , , , , CC: References: <20230711093529.18355-1-quic_devipriy@quicinc.com> <20230711093529.18355-4-quic_devipriy@quicinc.com> Content-Language: en-US From: Kathiravan T In-Reply-To: <20230711093529.18355-4-quic_devipriy@quicinc.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: coVgQE1THNUmsp74cCKzFpVn4McNc0et X-Proofpoint-ORIG-GUID: coVgQE1THNUmsp74cCKzFpVn4McNc0et X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.957,Hydra:6.0.601,FMLib:17.11.176.26 definitions=2023-08-24_02,2023-08-22_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 spamscore=0 clxscore=1011 phishscore=0 suspectscore=0 impostorscore=0 lowpriorityscore=0 adultscore=0 malwarescore=0 priorityscore=1501 mlxscore=0 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2308100000 definitions=main-2308240041 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 7/11/2023 3:05 PM, Devi Priya wrote: > Add NSSCC clock and reset definitions for ipq9574. > > Signed-off-by: Devi Priya > --- > .../bindings/clock/qcom,ipq9574-nsscc.yaml | 76 +++++++++ > .../dt-bindings/clock/qcom,ipq9574-nsscc.h | 152 ++++++++++++++++++ > .../dt-bindings/reset/qcom,ipq9574-nsscc.h | 134 +++++++++++++++ > 3 files changed, 362 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/qcom,ipq9574-nsscc.yaml > create mode 100644 include/dt-bindings/clock/qcom,ipq9574-nsscc.h > create mode 100644 include/dt-bindings/reset/qcom,ipq9574-nsscc.h > > diff --git a/Documentation/devicetree/bindings/clock/qcom,ipq9574-nsscc.yaml b/Documentation/devicetree/bindings/clock/qcom,ipq9574-nsscc.yaml > new file mode 100644 > index 000000000000..1e8754760785 > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/qcom,ipq9574-nsscc.yaml > @@ -0,0 +1,76 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/qcom,ipq9574-nsscc.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm Networking Sub System Clock & Reset Controller on IPQ9574 > + > +maintainers: > + - Bjorn Andersson > + - Anusha Rao > + > +description: | > + Qualcomm networking sub system clock control module provides the clocks, > + resets and power domains on IPQ9574 > + > + See also:: > + include/dt-bindings/clock/qcom,ipq9574-nsscc.h > + include/dt-bindings/reset/qcom,ipq9574-nsscc.h > + > +properties: > + compatible: > + const: qcom,ipq9574-nsscc > + > + clocks: > + items: > + - description: Bias PLL cc clock source > + - description: Bias PLL nss noc clock source > + - description: Bias PLL ubi nc clock source > + - description: GCC GPLL0 out aux clock source > + - description: Uniphy0 GCC Rx clock source > + - description: Uniphy0 GCC Tx clock source > + - description: Uniphy1 GCC Rx clock source > + - description: Uniphy1 GCC Tx clock source > + - description: Uniphy2 GCC Rx clock source > + - description: Uniphy2 GCC Tx clock source These are UniphyX *NSS* TX/RX clock source? Thanks,