From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A2190C5CFE7 for ; Tue, 10 Jul 2018 18:54:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5DAD8208FA for ; Tue, 10 Jul 2018 18:54:35 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5DAD8208FA Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1733229AbeGJSyw (ORCPT ); Tue, 10 Jul 2018 14:54:52 -0400 Received: from mga06.intel.com ([134.134.136.31]:4411 "EHLO mga06.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732459AbeGJSyv (ORCPT ); Tue, 10 Jul 2018 14:54:51 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 10 Jul 2018 11:54:31 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,335,1526367600"; d="scan'208";a="55495904" Received: from ray.jf.intel.com (HELO [10.7.201.145]) ([10.7.201.145]) by orsmga007.jf.intel.com with ESMTP; 10 Jul 2018 11:54:31 -0700 Subject: Re: [PATCH v2 1/4] x86/split_lock: Enumerate #AC exception for split locked access feature To: Fenghua Yu , Eduardo Habkost References: <1530282807-66555-1-git-send-email-fenghua.yu@intel.com> <1530282807-66555-2-git-send-email-fenghua.yu@intel.com> <20180704200742.GD7451@localhost.localdomain> <20180710184506.GA37857@romley-ivt3.sc.intel.com> Cc: Thomas Gleixner , Ingo Molnar , H Peter Anvin , Ashok Raj , Alan Cox , Peter Zijlstra , Rafael Wysocki , Tony Luck , Ravi V Shankar , linux-kernel , x86 , Vedvyas Shanbhogue From: Dave Hansen Openpgp: preference=signencrypt Autocrypt: addr=dave.hansen@intel.com; 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Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.8.0 MIME-Version: 1.0 In-Reply-To: <20180710184506.GA37857@romley-ivt3.sc.intel.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 07/10/2018 11:45 AM, Fenghua Yu wrote: > On Wed, Jul 04, 2018 at 05:07:42PM -0300, Eduardo Habkost wrote: >> On Fri, Jun 29, 2018 at 06:23:35PM +0200, Thomas Gleixner wrote: >>> On Fri, 29 Jun 2018, Dave Hansen wrote: >>>> Is this MSR not really model-specific? Is it OK to go poking at it on >>>> all x86 variants? Or, do we at _least_ need a check for Intel cpus in here? >>> >>> That definitely needs a vendor check. Also the whole code needs to be >>> compiled out if CONFIG_INTEL=n. >>> >>> Aside of that this wants to be enumerated. CPUID or MISC_FEATURES and not >>> this guess work detection logic. Why do I have to ask for that for every >>> other new feature thingy? >> >> Yes, please. KVM hosts normally expect guests to not touch MSRs >> unless we explicitly tell them the MSR is available (normally >> through CPUID). This is important to ensure live migration >> between different host kernel versions works reliably. > > The problem is the hardware design for the feature is complete. The > hardware designer cannot change the feature enumeration to CPUID or > MISC_FEATURES. Let's be honest, though. That's not *hardware* design; that is a microcode update. We've seen what microcode updates can do _very_ clearly with all the security issues. We (Intel) can surely fix this if sufficiently motivated. No? > There is no enumeration and no flag in /proc/cpuinfo flag for the feature. Huh? /proc/cpuinfo has tons on non-CPUID-instruction-based features. There's a retpoline one and a PTI one for goodness sake.