From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 62FBA4A32 for ; Mon, 13 Apr 2026 02:38:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776047884; cv=none; b=u5TVVlU0iz13U+egviNp2d0hTQS8SJzXohCnlR9F00iIjBbfmndL43amSqjl1HcJuJSaRpsFhWGKtYDt7a3Dkqle5fr80eL/cIl+xT7izeDcc1vDIq5V8P3i1JPavJirN454bUKvIyRgj1ti/XJyvacW2HicCdx1LdP37QkY5fU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776047884; c=relaxed/simple; bh=T3bYsYny+3TtbACKVYS5gBDxOmx+cEs+M/GJNIpv7Ag=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=PE9joTJmJDG+llJspJIFqGBoWCkqstPT048jNd6YHHs1Vyv5+p4ZSKT2otfoiWRcq/bipKEWNiQIjPia5x+eeguBLihZGqzqnBJK95Q01KkkJ/LgbNciz9IhBAPSCXGtmyIS9H9p/NlDJrarf7rtTuAqDZVCpSX3TJCH7yhuQ/k= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=CeL85N8g; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=TyRMT+8f; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="CeL85N8g"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="TyRMT+8f" Received: from pps.filterd (m0279863.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 63CLghqG3709159 for ; Mon, 13 Apr 2026 02:38:02 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= FgCGMrITMsvQlNVC3mg80gzZ7uOyka7TfasvEs9wxIA=; b=CeL85N8ggsjFvzjE GwXVHAJq9CZuSUy/AUinWkf5g5krNSBR3qms9O4EczqrS8Pd6UX/mXOOPC9qsbm/ LT6b2SDlsf3iahza9bdKTh2lpxSxgiKIWio96pfBTkjFodN4B/xiH4ac2DYcPqD7 5xpXIEGkTDsu1Ywe8qtQaKoND5/3kY0wopOd9lIE9mDh7Jr38psSzQFeJMjACUmH L6sKP+Q5Vx554e/OwavfgJuzwYowLh7zV7QfFZqwr4B9iRIb0vV/v98rM0BPJC56 wO3K8SiylX/VIwP/5c7FGZpr8w2dPCDYC6VDMLcf309ZGbsLMQLpZHWpdDz2SICD Uy1tMA== Received: from mail-pf1-f200.google.com (mail-pf1-f200.google.com [209.85.210.200]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4dfjbpb4gt-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Mon, 13 Apr 2026 02:38:02 +0000 (GMT) Received: by mail-pf1-f200.google.com with SMTP id d2e1a72fcca58-82c8768a704so1818861b3a.3 for ; Sun, 12 Apr 2026 19:38:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1776047882; x=1776652682; darn=vger.kernel.org; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=FgCGMrITMsvQlNVC3mg80gzZ7uOyka7TfasvEs9wxIA=; b=TyRMT+8fSzdOta5HytXvcA+svTnnE65LkbpOF0RG47a3u2l3Zjbd7EROvbJmOaUU8q mWT7UEeTmB8pGNA9lAJm8cADyMPBFjlgLLHfHtp56QbktEluDLYKrWMSsjC9ZADBKpON qmOPDPuUXzU65sRPazYB4zSpwLQGarbJXpoXEVqc/SQWHdwv0nKkqTeNn638TfKkPORx zZUQdQcmiLajfCZQPVHA2r7D07zzIfB7kbr3+3g2yNUrQ0U+zTUEbpYgml+4sRksRc2y KmK59+VC1f1XwFMq8gjqPNH3PbPxS63f3f7zRmNp/h0RgqS3+aidW9/FFbpxIfdAdSOP vG6w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1776047882; x=1776652682; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :x-gm-gg:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=FgCGMrITMsvQlNVC3mg80gzZ7uOyka7TfasvEs9wxIA=; b=B7ktXvD/VMwxoFv8rRgIFXfOcZJKpcqePQ44bErbfwIM2yz+ff1h52lXEl/kvhnzzo NVvwthEw0TkSlG/3eNmqPvmTVqGBYRJmp2T7YjdImW0PCfgCOB82SJqhFeRBxp/Z/NHo KyYgasD8c9b5rN1QX8Xena5zEihihdSW2dJJ81e+bs0IfWZXxBsmfWv8Ldz7WhxoUzsZ 1qy6MMQbLdhXa+wZ4vhZaljml9qaFOWb7aUVJVubSewftdTTaO1ddfi9PyTGrRMCTdGp nPdpEiyTAUD0RwcGXPIzFLEkDn+jgUmbYiWIrQs3u2Rvmac1zIKQIm63oaNcG7ew9fnm zRbg== X-Forwarded-Encrypted: i=1; AFNElJ9zc3tDKRQD4l776QgcyhOL8JNViqURMCxFistBmspsTD9x01OEXH/uOQ8NEfWwXjTCHOUH17EReCql8WI=@vger.kernel.org X-Gm-Message-State: AOJu0YxU1oHhC8muVoHu6ngoWbE5UMfN46fLUueKcRcc1IT5+aJBSvKQ ORwmhqvhSOX/HgBhCWVYwqn9SOX495JSI1bYupF+QY0Wc7JdZIkIeJBe1bKxC9u6HatS592q9cw BnPhepZVG5uz12YH1Dl7kQoJb7wid89cmn7lRJCM03x1U4uj5lfMfTh/o0yieG/D3ddxmT7iGNW UylA== X-Gm-Gg: AeBDiesgYsf21WThA24Sd4W4zObudlXjTbeFF9HTvtNJZi1w0lWTXZ3uT2yQfGSA90g 6NfbHFBWDP7Lx6BZmLBH+tHg/RElIbbUsa2sFRyTFHLzDQczJYD3CQavm1BMrQS9BTHeX4bSpMV OKIEEjx389hH2yD6fjuSCkFZsCJ3mRj+uPuXLgpgZU00vO+s1D5RMm+AN/10shrDSWkOZYDsF7/ vMBcs83fniRsbVxSBCDQVwyV89LPGVp+GNSI0lz3/KQ4QL4kY8p7Lu70d9x8w9Fscn3T8h2h5MF NaSF05S/zNeGka884rj7C9GhUb4MbTD7YbfxBcWrMRVM0QqWwGplqdjd6YuAaSi60me2c2zMXtb eMBkwz13h6abyYsXqVwCrK+Gq803R5oPZ//skfn7+3z+lsT2NBkeovHQmDNrZIls5X2UTcDCQUT jQNrlw7r0aGw== X-Received: by 2002:a05:6a00:bd85:b0:82c:225e:63c5 with SMTP id d2e1a72fcca58-82f0c28198dmr11495495b3a.18.1776047881497; Sun, 12 Apr 2026 19:38:01 -0700 (PDT) X-Received: by 2002:a05:6a00:bd85:b0:82c:225e:63c5 with SMTP id d2e1a72fcca58-82f0c28198dmr11495466b3a.18.1776047880963; Sun, 12 Apr 2026 19:38:00 -0700 (PDT) Received: from [10.133.33.35] (tpe-colo-wan-fw-bordernet.qualcomm.com. [103.229.16.4]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-82f0c32e744sm10486616b3a.13.2026.04.12.19.37.58 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 12 Apr 2026 19:38:00 -0700 (PDT) Message-ID: Date: Mon, 13 Apr 2026 10:37:56 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 3/5] coresight: etm4x: fix inconsistencies with sysfs configration To: Yeoreum Yun , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: suzuki.poulose@arm.com, mike.leach@arm.com, james.clark@linaro.org, alexander.shishkin@linux.intel.com, leo.yan@arm.com References: <20260412175506.412301-1-yeoreum.yun@arm.com> <20260412175506.412301-4-yeoreum.yun@arm.com> Content-Language: en-US From: Jie Gan In-Reply-To: <20260412175506.412301-4-yeoreum.yun@arm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=PuijqQM3 c=1 sm=1 tr=0 ts=69dc570a cx=c_pps a=mDZGXZTwRPZaeRUbqKGCBw==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=7CQSdrXTAAAA:8 a=ZlLZKcBJAC1nrxKUbvQA:9 a=QEXdDO2ut3YA:10 a=zc0IvFSfCIW2DFIPzwfm:22 a=a-qgeE7W1pNrGK8U0ZQC:22 X-Proofpoint-ORIG-GUID: g9s93TQcX2mbvD-J5kO8ziWEOryd4nMf X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDEzMDAyMiBTYWx0ZWRfX/y49MDXuj5L0 o8jbp0roJc3wMdnj9a43JOpn0CBis/P+spNAxnrSrHptE2l6mg+S7zBuOAbCkDjA+2SxQzQEAT0 nkDD/io5u/8w34Y+y/ZcEe5IF1jMyk56tm1CeeK/ropHAgvHSn/sadgK+bN6LFXNqiT2+9SBNL/ 7wW2QhIj5kT1qrUYiW97RqKNTB+9WvrZNGDNoU+MgmL2Jzq7uxXlw6KNWQ6ITjT+f/Il/HUwOHP GQU9FjHw883vPiYlIMBVVIgU2y5dxCw9wjL/BUPR9D+tXdA5FzTY0Xb2SA8JAwAvrjscS6j6XEs f0tGlXN6GHf6FUP7941NjEzZWutjO6E8W25j4zLqp52grFDOzFR2OPqQIfVovkd2Tzc+u37FXnr I7+KjzPOyFy6N7RorOAkYmzdfEVv2UfL5aI/PYQ91blO4gnP8UFymu66AktXQ45Kh5JxsnLqaa9 dj4PhXtL09QeZKVwH9Q== X-Proofpoint-GUID: g9s93TQcX2mbvD-J5kO8ziWEOryd4nMf X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-13_01,2026-04-09_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 lowpriorityscore=0 suspectscore=0 spamscore=0 phishscore=0 malwarescore=0 clxscore=1015 impostorscore=0 adultscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604010000 definitions=main-2604130022 Hi Yeoreum, On 4/13/2026 1:55 AM, Yeoreum Yun wrote: > The current ETM4x configuration via sysfs can lead to the following > inconsistencies: > > - If a configuration is modified via sysfs while a perf session is > active, the running configuration may differ between before > a sched-out and after a subsequent sched-in. > > - If a perf session and sysfs session tries to enable concurrently, > configuration from configfs could be corrupted. > > - There is chance to corrupt drvdata->config if perf session tries > to enabled among handling cscfg_csdev_disable_active_config() > in etm4_disable_sysfs(). > > To resolve these inconsistencies, the configuration should be separated into: > > - active_config, which is applied configuration for the current session > - config, which stores the settings configured via sysfs. > > and apply configuration from configfs after taking a mode. typo in subject: s/configration/configuration > > Signed-off-by: Yeoreum Yun > --- > .../hwtracing/coresight/coresight-etm4x-cfg.c | 2 +- > .../coresight/coresight-etm4x-core.c | 74 ++++++++++++------- > drivers/hwtracing/coresight/coresight-etm4x.h | 2 + > 3 files changed, 49 insertions(+), 29 deletions(-) > > diff --git a/drivers/hwtracing/coresight/coresight-etm4x-cfg.c b/drivers/hwtracing/coresight/coresight-etm4x-cfg.c > index d14d7c8a23e5..0553771d04e7 100644 > --- a/drivers/hwtracing/coresight/coresight-etm4x-cfg.c > +++ b/drivers/hwtracing/coresight/coresight-etm4x-cfg.c > @@ -47,7 +47,7 @@ static int etm4_cfg_map_reg_offset(struct etmv4_drvdata *drvdata, > struct cscfg_regval_csdev *reg_csdev, u32 offset) > { > int err = -EINVAL, idx; > - struct etmv4_config *drvcfg = &drvdata->config; > + struct etmv4_config *drvcfg = &drvdata->active_config; > u32 off_mask; <...> > struct device *etm_dev = &csdev->dev; > struct csdev_access *csa = &csdev->access; > @@ -616,19 +621,36 @@ static int etm4_enable_hw(struct etmv4_drvdata *drvdata) > static void etm4_enable_sysfs_smp_call(void *info) > { > struct etm4_enable_arg *arg = info; > + struct etmv4_drvdata *drvdata; > struct coresight_device *csdev; > > if (WARN_ON(!arg)) > return; > > - csdev = arg->drvdata->csdev; > + drvdata = arg->drvdata; > + csdev = drvdata->csdev; > if (!coresight_take_mode(csdev, CS_MODE_SYSFS)) { > /* Someone is already using the tracer */ > arg->rc = -EBUSY; > return; > } > > - arg->rc = etm4_enable_hw(arg->drvdata); > + drvdata->active_config = drvdata->config; > + > + if (arg->cfg_hash) { > + arg->rc = cscfg_csdev_enable_active_config(csdev, > + arg->cfg_hash, > + arg->preset); > + if (arg->rc) we need reset the mode once enable failed before return. coresight_set_mode(csdev, CS_MODE_DISABLED); Thanks, Jie > + return; > + } > + > + drvdata->trcid = arg->trace_id; > + > + /* Tracer will never be paused in sysfs mode */ > + drvdata->paused = false; > + > + arg->rc = etm4_enable_hw(drvdata); > > /* The tracer didn't start */ > if (arg->rc) > @@ -670,7 +692,7 @@ static int etm4_config_timestamp_event(struct etmv4_drvdata *drvdata, > int ctridx; > int rselector; > const struct etmv4_caps *caps = &drvdata->caps; > - struct etmv4_config *config = &drvdata->config; > + struct etmv4_config *config = &drvdata->active_config; > > /* No point in trying if we don't have at least one counter */ > if (!caps->nr_cntr) > @@ -754,7 +776,7 @@ static int etm4_parse_event_config(struct coresight_device *csdev, > int ret = 0; > struct etmv4_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); > const struct etmv4_caps *caps = &drvdata->caps; > - struct etmv4_config *config = &drvdata->config; > + struct etmv4_config *config = &drvdata->active_config; > struct perf_event_attr max_timestamp = { > .ATTR_CFG_FLD_timestamp_CFG = U64_MAX, > }; > @@ -916,24 +938,18 @@ static int etm4_enable_sysfs(struct coresight_device *csdev, struct coresight_pa > > /* enable any config activated by configfs */ > cscfg_config_sysfs_get_active_cfg(&cfg_hash, &preset); > - if (cfg_hash) { > - ret = cscfg_csdev_enable_active_config(csdev, cfg_hash, preset); > - if (ret) > - return ret; > - } > > raw_spin_lock(&drvdata->spinlock); > > - drvdata->trcid = path->trace_id; > - > - /* Tracer will never be paused in sysfs mode */ > - drvdata->paused = false; > - > /* > * Executing etm4_enable_hw on the cpu whose ETM is being enabled > * ensures that register writes occur when cpu is powered. > */ > arg.drvdata = drvdata; > + arg.cfg_hash = cfg_hash; > + arg.preset = preset; > + arg.trace_id = path->trace_id; > + > ret = smp_call_function_single(drvdata->cpu, > etm4_enable_sysfs_smp_call, &arg, 1); > if (!ret) > @@ -1034,7 +1050,7 @@ static void etm4_disable_hw(struct etmv4_drvdata *drvdata) > { > u32 control; > const struct etmv4_caps *caps = &drvdata->caps; > - struct etmv4_config *config = &drvdata->config; > + struct etmv4_config *config = &drvdata->active_config; > struct coresight_device *csdev = drvdata->csdev; > struct csdev_access *csa = &csdev->access; > int i; > @@ -1070,6 +1086,8 @@ static void etm4_disable_sysfs_smp_call(void *info) > > etm4_disable_hw(drvdata); > > + cscfg_csdev_disable_active_config(drvdata->csdev); > + > coresight_set_mode(drvdata->csdev, CS_MODE_DISABLED); > } > > @@ -1130,9 +1148,6 @@ static void etm4_disable_sysfs(struct coresight_device *csdev) > drvdata, 1); > > raw_spin_unlock(&drvdata->spinlock); > - > - cscfg_csdev_disable_active_config(csdev); > - > cpus_read_unlock(); > > /* > @@ -1375,6 +1390,7 @@ static void etm4_init_arch_data(void *info) > struct etm4_init_arg *init_arg = info; > struct etmv4_drvdata *drvdata; > struct etmv4_caps *caps; > + struct etmv4_config *config; > struct csdev_access *csa; > struct device *dev = init_arg->dev; > int i; > @@ -1382,6 +1398,7 @@ static void etm4_init_arch_data(void *info) > drvdata = dev_get_drvdata(init_arg->dev); > caps = &drvdata->caps; > csa = init_arg->csa; > + config = &drvdata->active_config; > > /* > * If we are unable to detect the access mechanism, > @@ -1442,7 +1459,7 @@ static void etm4_init_arch_data(void *info) > > /* EXLEVEL_S, bits[19:16] Secure state instruction tracing */ > caps->s_ex_level = FIELD_GET(TRCIDR3_EXLEVEL_S_MASK, etmidr3); > - drvdata->config.s_ex_level = caps->s_ex_level; > + config->s_ex_level = caps->s_ex_level; > /* EXLEVEL_NS, bits[23:20] Non-secure state instruction tracing */ > caps->ns_ex_level = FIELD_GET(TRCIDR3_EXLEVEL_NS_MASK, etmidr3); > /* > @@ -1687,7 +1704,7 @@ static void etm4_set_default(struct etmv4_config *config) > static int etm4_get_next_comparator(struct etmv4_drvdata *drvdata, u32 type) > { > int nr_comparator, index = 0; > - struct etmv4_config *config = &drvdata->config; > + struct etmv4_config *config = &drvdata->active_config; > > /* > * nr_addr_cmp holds the number of comparator _pair_, so time 2 > @@ -1728,7 +1745,7 @@ static int etm4_set_event_filters(struct etmv4_drvdata *drvdata, > { > int i, comparator, ret = 0; > u64 address; > - struct etmv4_config *config = &drvdata->config; > + struct etmv4_config *config = &drvdata->active_config; > struct etm_filters *filters = event->hw.addr_filters; > > if (!filters) > @@ -2250,7 +2267,8 @@ static int etm4_add_coresight_dev(struct etm4_init_arg *init_arg) > if (!desc.name) > return -ENOMEM; > > - etm4_set_default(&drvdata->config); > + etm4_set_default(&drvdata->active_config); > + drvdata->config = drvdata->active_config; > > pdata = coresight_get_platform_data(dev); > if (IS_ERR(pdata)) > diff --git a/drivers/hwtracing/coresight/coresight-etm4x.h b/drivers/hwtracing/coresight/coresight-etm4x.h > index 3cc1ca76c933..b943c28c9c71 100644 > --- a/drivers/hwtracing/coresight/coresight-etm4x.h > +++ b/drivers/hwtracing/coresight/coresight-etm4x.h > @@ -1069,6 +1069,7 @@ struct etmv4_save_state { > * allows tracing at all ELs. We don't want to compute this > * at runtime, due to the additional setting of TRFCR_CX when > * in EL2. Otherwise, 0. > + * @active_config: structure holding current applied configuration parameters. > * @config: structure holding configuration parameters. > * @save_state: State to be preserved across power loss > * @paused: Indicates if the trace unit is paused. > @@ -1089,6 +1090,7 @@ struct etmv4_drvdata { > bool os_unlock : 1; > bool paused : 1; > u64 trfcr; > + struct etmv4_config active_config; > struct etmv4_config config; > struct etmv4_save_state *save_state; > DECLARE_BITMAP(arch_features, ETM4_IMPDEF_FEATURE_MAX);