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([2a05:6e02:1041:c10:d521:838e:7c69:f457]) by smtp.googlemail.com with ESMTPSA id 5b1f17b1804b1-45e0159c27csm21731545e9.8.2025.09.11.16.03.07 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 11 Sep 2025 16:03:08 -0700 (PDT) Message-ID: Date: Fri, 12 Sep 2025 01:03:06 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 2/2] iio: adc: Add the NXP SAR ADC support for the s32g2/3 platforms To: David Lechner , jic23@kernel.org, nuno.sa@analog.com, andy@kernel.org, robh@kernel.org, conor+dt@kernel.org, krzk+dt@kernel.org Cc: linux-iio@vger.kernel.org, s32@nxp.com, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, chester62515@gmail.com, mbrugger@suse.com, ghennadi.procopciuc@oss.nxp.com References: <20250910155759.75380-1-daniel.lezcano@linaro.org> <20250910155759.75380-3-daniel.lezcano@linaro.org> Content-Language: en-US From: Daniel Lezcano In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Hi David, On 11/09/2025 22:10, David Lechner wrote: > On 9/10/25 10:57 AM, Daniel Lezcano wrote: [ ... ] >> + /* iio_push_to_buffers_with_timestamp should not be called >> + * with dma_samples as parameter. The samples will be smashed >> + * if timestamp is enabled. >> + */ >> + timestamp = iio_get_time_ns(indio_dev); >> + ret = iio_push_to_buffers_with_timestamp(indio_dev, >> + info->buffer, >> + timestamp); > > Is it OK to call this with spinlock held? It looks like it can call > devm_krealloc() which may sleep. > It should be ok, devm_krealloc is in the code path of iio_push_to_buffers_with_ts_unaligned(), not in iio_push_to_buffers_with_timestamp() > ... > >> +static int nxp_sar_adc_probe(struct platform_device *pdev) >> +{ >> + const struct nxp_sar_adc_data *data; >> + struct nxp_sar_adc *info; >> + struct iio_dev *indio_dev; >> + struct resource *mem; >> + struct device *dev = &pdev->dev; >> + int irq; >> + int ret; >> + >> + indio_dev = devm_iio_device_alloc(dev, sizeof(struct nxp_sar_adc)); >> + if (!indio_dev) >> + return -ENOMEM; >> + >> + info = iio_priv(indio_dev); >> + >> + data = device_get_match_data(dev); >> + >> + info->vref_mV = data->vref_mV; >> + >> + info->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &mem); >> + if (IS_ERR(info->regs)) >> + return dev_err_probe(dev, PTR_ERR(info->regs), >> + "failed to get and remap resource"); >> + >> + irq = platform_get_irq(pdev, 0); >> + if (irq < 0) >> + return irq; >> + >> + ret = devm_request_irq(dev, irq, nxp_sar_adc_isr, 0, >> + dev_name(dev), indio_dev); >> + if (ret < 0) >> + return dev_err_probe(dev, ret, "failed requesting irq, irq = %d\n", irq); >> + >> + info->regs_phys = mem->start; >> + spin_lock_init(&info->lock); >> + >> + info->clk = devm_clk_get_enabled(dev, "adc"); > > clock-names was dropped from bindings, so name should be NULL. Right, I found it when I removed the clock-names from the DT :) > >> +static const struct nxp_sar_adc_data s32g2_sar_adc_data = { .vref_mV = 1800 }; > > Why have this if there is only one option? There will be the ADC model name/variant in V3. Thanks! -- Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog