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From: AngeloGioacchino Del Regno  <angelogioacchino.delregno@somainline.org>
To: Rob Herring <robh@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org, linux-pm@vger.kernel.org,
	ulf.hansson@linaro.org, jorge.ramirez-ortiz@linaro.org,
	broonie@kernel.org, lgirdwood@gmail.com,
	daniel.lezcano@linaro.org, nks@flawful.org,
	bjorn.andersson@linaro.org, agross@kernel.org,
	viresh.kumar@linaro.org, rjw@rjwysocki.net,
	konrad.dybcio@somainline.org, martin.botka@somainline.org,
	marijn.suijten@somainline.org, phone-devel@vger.kernel.org
Subject: Re: [PATCH 13/13] dt-bindings: cpufreq: qcom-hw: Add bindings for 8998
Date: Tue, 22 Dec 2020 22:11:53 +0100	[thread overview]
Message-ID: <ea5cb3fc-3bda-e220-c0ba-6fd50d648737@somainline.org> (raw)
In-Reply-To: <20201208181103.GA2795715@robh.at.kernel.org>

Il 08/12/20 19:11, Rob Herring ha scritto:

Hello! Replying very late seem to be obligatory for me nowadays
so for this and for any other late replies: I'm sorry!

> On Thu, Nov 26, 2020 at 07:45:59PM +0100, AngeloGioacchino Del Regno wrote:
>> The OSM programming addition has been done under the
>> qcom,cpufreq-hw-8998 compatible name: specify the requirement
>> of two additional register spaces for this functionality.
>>
>> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
>> ---
>>   .../bindings/cpufreq/qcom,cpufreq-hw.yaml     | 31 ++++++++++++++++---
>>   1 file changed, 27 insertions(+), 4 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/cpufreq/qcom,cpufreq-hw.yaml b/Documentation/devicetree/bindings/cpufreq/qcom,cpufreq-hw.yaml
>> index 94a56317b14b..f64cea73037e 100644
>> --- a/Documentation/devicetree/bindings/cpufreq/qcom,cpufreq-hw.yaml
>> +++ b/Documentation/devicetree/bindings/cpufreq/qcom,cpufreq-hw.yaml
>> @@ -23,17 +23,21 @@ properties:
>>             - qcom,cpufreq-epss
>>   
>>     reg:
>> +    description: Base address and size of the RBCPR register region
> 
> That doesn't make sense given you have 2 regions.
> 
>>       minItems: 2
>>       maxItems: 2
> 
> maxItems: 4
> 
Indeed it doesn't make sense.

>>   
>>     reg-names:
>>       description:
>> -      Frequency domain register region for each domain.
>> -    items:
>> -      - const: "freq-domain0"
>> -      - const: "freq-domain1"
>> +      Frequency domain register region for each domain. If OSM programming
>> +      does not happen in the bootloader and has to be done in this driver,
>> +      then also the OSM domain region osm-domain[0-1] has to be provided.
> 
> Don't write free form text for what can be expressed as schema.
> 
I guess the later 'if' for 8998 is sufficient to express that, then...
right?

>> +    minItems: 2
>> +    maxItems: 2
> 
> You obviously haven't tried this change with 8998. It will fail with
> more than 2. What you need here is:
> 
My testing methodology must be flawed. Or perhaps I just need some more 
sleep... probably the latter.

> minItems: 2
> maxItems: 4
> 
> items:
>    - const: "freq-domain0"
>    - const: "freq-domain1"
>    - const: "osm-domain0"
>    - const: "osm-domain1"
> 
> And then...
> 
>>   
>>     clock-names:
>> +    minItems: 2
>> +    maxItems: 2
>>       - const: xo
>>       - const: ref
>>   
>> @@ -53,9 +57,28 @@ properties:
>>         property with phandle to a cpufreq_hw followed by the Domain ID(0/1)
>>         in the CPU DT node.
>>   
>> +allOf:
>> + - if:
>> +     properties:
>> +       reg-names:
>> +         contains:
>> +           const: qcom,cpufreq-hw-8998
>> +   then:
>> +     properties:
>> +       reg:
>> +         minItems: 4
>> +         maxItems: 4
>> +       reg-names:
> 
> ...here just:
> 
> minItems: 4
> 
> And you'll need an 'else' clause with 'maxItems: 2' for reg and
> reg-names.
> 
Big thank you for that!!!

>> +         items:
>> +           - const: "freq-domain0"
>> +           - const: "freq-domain1"
>> +           - const: "osm-domain0"
>> +           - const: "osm-domain1"
>> +
>>   required:
>>     - compatible
>>     - reg
>> +  - reg-names
> 
> You can't make something that was optional now required. (Unless it was
> a mistake and all existing users always had 'reg-names'.)
> 
Well, yes. All existing users are already declaring reg-names, no DT 
changes to do for them.

>>     - clock-names
>>     - clocks
>>     - "#freq-domain-cells"
>> -- 
>> 2.29.2
>>

Thanks for the review.
A V2 of the entire series will come soon!

-- Angelo

      reply	other threads:[~2020-12-22 21:12 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-26 18:45 [PATCH 00/13] Enable CPRh/3/4, CPU Scaling on various QCOM SoCs AngeloGioacchino Del Regno
2020-11-26 18:45 ` [PATCH 01/13] cpuidle: qcom_spm: Detach state machine from main SPM handling AngeloGioacchino Del Regno
2020-11-27 18:07   ` kernel test robot
2020-11-26 18:45 ` [PATCH 02/13] soc: qcom: spm: Implement support for SAWv4.1, SDM630/660 L2 AVS AngeloGioacchino Del Regno
2020-11-26 18:45 ` [PATCH 03/13] soc: qcom: spm: Add compatible for MSM8998 SAWv4.1 L2 AngeloGioacchino Del Regno
2020-11-26 18:45 ` [PATCH 04/13] cpufreq: blacklist SDM630/636/660 in cpufreq-dt-platdev AngeloGioacchino Del Regno
2020-11-26 18:45 ` [PATCH 05/13] soc: qcom: cpr: Move common functions to new file AngeloGioacchino Del Regno
2020-11-26 18:45 ` [PATCH 06/13] arm64: qcom: qcs404: Change CPR nvmem-names AngeloGioacchino Del Regno
2020-11-26 18:45 ` [PATCH 07/13] dt-bindings: avs: cpr: Convert binding to YAML schema AngeloGioacchino Del Regno
2020-11-30 17:03   ` Rob Herring
2020-11-26 18:45 ` [PATCH 08/13] soc: qcom: Add support for Core Power Reduction v3, v4 and Hardened AngeloGioacchino Del Regno
2020-11-26 18:45 ` [PATCH 09/13] MAINTAINERS: Add entry for Qualcomm CPRv3/v4/Hardened driver AngeloGioacchino Del Regno
2020-11-26 18:45 ` [PATCH 10/13] dt-bindings: soc: qcom: cpr3: Add bindings for CPR3 driver AngeloGioacchino Del Regno
2020-11-30 17:22   ` Rob Herring
2020-11-26 18:45 ` [PATCH 11/13] dt-bindings: cpufreq: Convert qcom-cpufreq-hw to YAML binding AngeloGioacchino Del Regno
2020-11-30 17:23   ` Rob Herring
2020-11-30 18:23     ` AngeloGioacchino Del Regno
2020-12-03 11:14     ` Manivannan Sadhasivam
2020-12-04  0:13       ` AngeloGioacchino Del Regno
2020-12-08 15:41         ` Manivannan Sadhasivam
2020-11-26 18:45 ` [PATCH 12/13] cpufreq: qcom-hw: Implement CPRh aware OSM programming AngeloGioacchino Del Regno
2020-12-18  7:16   ` Viresh Kumar
2020-11-26 18:45 ` [PATCH 13/13] dt-bindings: cpufreq: qcom-hw: Add bindings for 8998 AngeloGioacchino Del Regno
2020-12-08 18:11   ` Rob Herring
2020-12-22 21:11     ` AngeloGioacchino Del Regno [this message]

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